> -----Original Message-----
> From: Russell King - ARM Linux admin <li...@armlinux.org.uk>
> Sent: Monday, February 18, 2019 1:28 PM
> To: Stefan Chulski <stef...@marvell.com>
> Cc: Antoine Tenart <antoine.ten...@bootlin.com>; da...@davemloft.net;
> net...@vger.kernel.org; linux-kernel@vger.kernel.org;
> thomas.petazz...@bootlin.com; maxime.chevall...@bootlin.com;
> gregory.clem...@bootlin.com; miquel.ray...@bootlin.com; Nadav Haklai
> <nad...@marvell.com>; Yan Markman <ymark...@marvell.com>;
> m...@semihalf.com
> Subject: Re: [EXT] Re: [PATCH net-next 10/13] net: mvpp2: reset the XPCS
> while reconfiguring the serdes lanes
>
> Hi Stefan,
>
> On Mon, Feb 18, 2019 at 11:08:34AM +0000, Stefan Chulski wrote:
> > HW recommendation upon Serdes reconfiguration are the following:
> >
> > 1. Disable port(CTRL0_REG - in XLG/GMAC) 2. Put port in reset (both
> > XLG/GMAC) 3. For KR - put in reset MPCS (MAC control clock, RX SD
> > clock, TX SD clock), XPSC is RXAUI/XAUI clock domain 4. Power down
> > Serdes lane
> >
> > Do reconfiguration of Serdes.
> >
> > 5. Enable Serdes lane
> > 6. Disable MPCS reset for KR
> > 7. Disable port reset (both XLG/GMAC)
> > 8. Enable port (both XLG/GMAC)
>
> For clarity, presumably either the XLG or the GMAC should be released from
> reset and enabled at any one time depending on the configured mode, but
> never both together?
Yes.
Only one of them the XLG or the GMAC ,depending on the configured mode.
Best Regards.
