HI
> From: Jiada Wang <jiada_w...@mentor.com>
>
> Currently each SSI unit 's busif mode/adinr/dalign address is
> registered by: (in busif4 case)
> RSND_GEN_M_REG(SSI_BUSIF4_MODE, 0x500, 0x80)
> RSND_GEN_M_REG(SSI_BUSIF4_ADINR,0x504, 0x80)
> RSND_GEN_M_REG(SSI_BUSIF4_DALIGN, 0x508, 0x80)
>
> But according to user manual 41.1.4 Register Configuration
> ssi9 4/5/6/7 busif mode/adinr/dalign register address
> ( SSI9-[4/5/6/7]_BUSIF_[MODE/ADINR/DALIGN] )
> are out of this rule.
>
> This patch registers ssi9 4/5/6/7 mode/adinr/dalign register
> as single register, and access these registers in case of
> SSI9 BUSIF 4/5/6/7.
>
> Fixes: commit 8c9d75033340 ("ASoC: rsnd: ssiu: Support BUSIF other than
> BUSIF0")
> Signed-off-by: Jiada Wang <jiada_w...@mentor.com>
> Signed-off-by: Timo Wischer <twisc...@de.adit-jv.com>
> ---
Acked-by: Kuninori Morimoto <kuninori.morimoto...@renesas.com>
