On 25/02/19 14:27, Yang Weijiang wrote: > For Guest XSS, right now, only bit 11(user states) and bit 12 > (supervisor states) are supported, if other bits are being set, > need to modify KVM_SUPPORTED_XSS macro to have support. > > Signed-off-by: Zhang Yi Z <yi.z.zh...@linux.intel.com> > Signed-off-by: Yang Weijiang <weijiang.y...@intel.com> > --- > arch/x86/kvm/vmx.c | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c > index d32cee9ee079..68908ed7b151 100644 > --- a/arch/x86/kvm/vmx.c > +++ b/arch/x86/kvm/vmx.c > @@ -47,6 +47,7 @@ > #include <asm/virtext.h> > #include <asm/mce.h> > #include <asm/fpu/internal.h> > +#include <asm/fpu/types.h> > #include <asm/perf_event.h> > #include <asm/debugreg.h> > #include <asm/kexec.h> > @@ -4336,12 +4337,13 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct > msr_data *msr_info) > case MSR_IA32_XSS: > if (!vmx_xsaves_supported()) > return 1; > + > /* > - * The only supported bit as of Skylake is bit 8, but > - * it is not supported on KVM. > + * Check bits being set are supported in KVM. > */ > - if (data != 0) > + if (data & ~kvm_supported_xss()) > return 1; > + > vcpu->arch.ia32_xss = data; > if (vcpu->arch.ia32_xss != host_xss) > add_atomic_switch_msr(vmx, MSR_IA32_XSS, >
Luwei, can you work with Weijiang to add XSAVES support for Processor Tracing? Paolo
