Display controller reset must be done as soon as possible after enable
the clock to avoid partial refresh on screen.

Signed-off-by: Yannick Fertré <yannick.fer...@st.com>
---
 drivers/gpu/drm/stm/ltdc.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
index 32fd6a3..7bbe61c 100644
--- a/drivers/gpu/drm/stm/ltdc.c
+++ b/drivers/gpu/drm/stm/ltdc.c
@@ -1134,6 +1134,12 @@ int ltdc_load(struct drm_device *ddev)
                return -ENODEV;
        }
 
+       if (!IS_ERR(rstc)) {
+               reset_control_assert(rstc);
+               usleep_range(10, 20);
+               reset_control_deassert(rstc);
+       }
+
        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        ldev->regs = devm_ioremap_resource(dev, res);
        if (IS_ERR(ldev->regs)) {
@@ -1156,12 +1162,6 @@ int ltdc_load(struct drm_device *ddev)
                }
        }
 
-       if (!IS_ERR(rstc)) {
-               reset_control_assert(rstc);
-               usleep_range(10, 20);
-               reset_control_deassert(rstc);
-       }
-
        /* Disable interrupts */
        reg_clear(ldev->regs, LTDC_IER,
                  IER_LIE | IER_RRIE | IER_FUIE | IER_TERRIE);
-- 
2.7.4

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