This patch fixes pin assign of cts and rts signal of UART3.

Currently GPIO3_C2 and C3 pins are assigned but TRM says that
GPIO3_C0 and C1 are correct.

Refer:
  RK3399 TRM v1.4 - Table 19-1 UART Interface Description

Signed-off-by: Katsuhiro Suzuki <katsuh...@katsuster.net>
---
 arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index f54c855f8cdf..196ac9b78076 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -2543,12 +2543,12 @@
 
                        uart3_cts: uart3-cts {
                                rockchip,pins =
-                                       <3 RK_PC2 2 &pcfg_pull_none>;
+                                       <3 RK_PC0 2 &pcfg_pull_none>;
                        };
 
                        uart3_rts: uart3-rts {
                                rockchip,pins =
-                                       <3 RK_PC3 2 &pcfg_pull_none>;
+                                       <3 RK_PC1 2 &pcfg_pull_none>;
                        };
                };
 
-- 
2.20.1

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