On Wed, Apr 10, 2019 at 8:54 PM Thomas Gleixner <t...@linutronix.de> wrote: > On Tue, 9 Apr 2019, Daniel Drake wrote: > > On Wed, Apr 3, 2019 at 7:21 PM Thomas Gleixner <t...@linutronix.de> wrote: > > > - Prevent the TSC calibration code from touching PIT/HPET. It > > > should do that already when the TSC frequency can be retrieved > > > via CPUID or MSR. Should work, emphasis on should ... > > > > >From above, this seems to be working acceptably already. It does touch > > the PIT, but ultimately ignores the information that it provided. > > Yes, but we might actually be smarter than that.
Do you have anything specific in mind? You originally laid out this idea in the context of doing this if the PIT/HPET is not working. However, I can't immediately see how to judge that because: - According to the analysis in my last mail, the PIT is actually ticking even when it is gated in the BIOS. The BIOS setting just seems to make it tick 4 times slower and not generate any IRQ0 interrupts. - TSC calibration code runs really early during boot. To make it detect this situation we could make it check if IRQ0 is working, however setup_default_timer_irq() only happens a lot later, so I'm not sure how this could be checked at such an early stage. I think I'm now fairly clear on the other suggestions you have made so I'll see if I can come up with some patches. Thanks! Daniel
