On Mon, May 20, 2019 at 9:50 AM Alex Elder <el...@linaro.org> wrote: > > On 5/20/19 11:34 AM, Evan Green wrote: > > On Mon, May 20, 2019 at 7:44 AM Alex Elder <el...@linaro.org> wrote: > >> > >> On 5/20/19 9:43 AM, Arnd Bergmann wrote: > >>> I have no idea how two 8-bit assignments could do that, > >>> it sounds like a serious gcc bug, unless you mean two > >>> 8-byte assignments, which would be within the range > >>> of expected behavior. If it's actually 8-bit stores, please > >>> open a bug against gcc with a minimized test case. > >> > >> Sorry, it's 8 *byte* assignments, not 8 bit. -Alex > > > > Is it important to the hardware that you're writing all 128 bits of > > No, it is not important in the ways you are describing. > > We're just geeking out over how to get optimal performance. > A single 128-bit write is nicer than two 64-bit writes, > or more smaller writes. > > The hardware won't touch the TRE until the doorbell gets > rung telling it that it is permitted to do so. The doorbell > is an I/O write, which implies a memory barrier, so the entire > TRE will be up-to-date in memory regardless of whether we > write it 128 bits or 8 bits at a time. >
Ah, understood. Carry on!