On Fri, May 31, 2019 at 02:22:27PM -0700, Andy Lutomirski wrote: > > > On May 31, 2019, at 2:05 PM, Jiri Kosina <ji...@kernel.org> wrote: > > > >> On Fri, 31 May 2019, Andy Lutomirski wrote: > >> > >> The Intel SDM Vol 3 34.10 says: > >> > >> If the HLT instruction is restarted, the processor will generate a > >> memory access to fetch the HLT instruction (if it is > >> not in the internal cache), and execute a HLT bus transaction. This > >> behavior results in multiple HLT bus transactions > >> for the same HLT instruction. > > > > Which basically means that both hibernation and kexec have been broken in > > this respect for gazillions of years, and seems like noone noticed. Makes > > one wonder what the reason for that might be. > > > > Either SDM is not precise and the refetch actually never happens for real > > (or is always in these cases satisfied from I$ perhaps?), or ... ? > > > > So my patch basically puts things back where they have been for ages > > (while mwait is obviously much worse, as that gets woken up by the write > > to the monitored address, which inevitably does happen during resume), but > > seems like SDM is suggesting that we've been in a grey zone wrt RSM at > > least for all those ages. > > > > So perhaps we really should ditch resume_play_dead() altogether > > eventually, and replace it with sending INIT IPI around instead (and then > > waking the CPUs properly via INIT INIT START). I'd still like to do that > > for 5.3 though, as that'd be slightly bigger surgery, and conservatively > > put things basically back to state they have been up to now for 5.2. > > > > > Seems reasonable to me. I would guess that it mostly works because SMI isn’t > all that common and the window where it matters is short. Or maybe the SDM > is misleading.
For P6 and later, i.e. all modern CPUs, Intel processors go straight to halted state and don't fetch/decode the HLT instruction. P5 actually did a fetch, but from what I can tell that behavior wasn't carried forward to KNC, unlike other legacy interrupt crud from P5: [1] https://lkml.kernel.org/r/20190430004504.gh31...@linux.intel.com
