The interrupt line of the RTL8211F PHY is routed to the GPIOZ_14 pad.
Describe this in the device tree so the PHY framework doesn't have to
poll the PHY status.

Acked-by: Neil Armstrong <narmstr...@baylibre.com>
Tested-by: Neil Armstrong <narmstr...@baylibre.com>
Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com>
---
 arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts 
b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
index 82b42c073c5e..81780ffcc7f0 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts
@@ -254,6 +254,10 @@
                reset-assert-us = <10000>;
                reset-deassert-us = <30000>;
                reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | 
GPIO_OPEN_DRAIN)>;
+
+               interrupt-parent = <&gpio_intc>;
+               /* MAC_INTR on GPIOZ_14 */
+               interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
        };
 };
 
-- 
2.22.0

Reply via email to