Per feedback from NXP tech support the way to use register based service interface on i.MX8MQ is to follow the same set of steps outlined for the case when virtualization is enabled, regardless if it is. Current version of SRM for i.MX8MQ speaks of DECO DID_MS and DECO DID_LS registers, but apparently those are not implemented, so the case when SCFGR[VIRT_EN]=0 should be handles the same as the case when SCFGR[VIRT_EN]=1
Signed-off-by: Andrey Smirnov <andrew.smir...@gmail.com> Cc: Chris Spencer <christopher.spen...@sea.co.uk> Cc: Cory Tusar <cory.tu...@zii.aero> Cc: Chris Healy <cphe...@gmail.com> Cc: Lucas Stach <l.st...@pengutronix.de> Cc: Horia Geantă <horia.gea...@nxp.com> Cc: Aymen Sghaier <aymen.sgha...@nxp.com> Cc: Leonard Crestez <leonard.cres...@nxp.com> Cc: linux-cry...@vger.kernel.org Cc: linux-kernel@vger.kernel.org --- drivers/crypto/caam/ctrl.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c index e674d8770cdb..e6e2457a573e 100644 --- a/drivers/crypto/caam/ctrl.c +++ b/drivers/crypto/caam/ctrl.c @@ -107,7 +107,12 @@ static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc, int i; - if (ctrlpriv->virt_en == 1) { + if (ctrlpriv->virt_en == 1 || + /* + * Apparently on i.MX8MQ it doesn't matter if virt_en == 1 + * and the following steps should be performed regardless + */ + of_machine_is_compatible("fsl,imx8mq")) { clrsetbits_32(&ctrl->deco_rsr, 0, DECORSR_JR0); while (!(rd_reg32(&ctrl->deco_rsr) & DECORSR_VALID) && -- 2.21.0