> On Jun 14, 2019, at 8:58 AM, Sean Christopherson
> <sean.j.christopher...@intel.com> wrote:
>
> On Wed, Jun 12, 2019 at 11:48:12PM -0700, Nadav Amit wrote:
>> diff --git a/arch/x86/include/asm/tlbflush.h
>> b/arch/x86/include/asm/tlbflush.h
>> index 79272938cf79..a1fea36d5292 100644
>> --- a/arch/x86/include/asm/tlbflush.h
>> +++ b/arch/x86/include/asm/tlbflush.h
>
> ...
>
>> @@ -439,6 +442,7 @@ static inline void __native_flush_tlb_one_user(unsigned
>> long addr)
>> {
>> u32 loaded_mm_asid = this_cpu_read(cpu_tlbstate.loaded_mm_asid);
>>
>> + //invpcid_flush_one(kern_pcid(loaded_mm_asid), addr);
>
> Leftover debug/testing code.
Indeed, thanks. I will fix on v2 (once I get some more feedback).
