On 18/06/2019 15:03, Dmitry Osipenko wrote: > We're adjusting the timer's base for each per-CPU timer to point to the > actual start of the timer since device-tree defines a compound registers > range that includes all of the timers. In this case the original base > need to be restore before calling iounmap to unmap the proper address. > > Signed-off-by: Dmitry Osipenko <dig...@gmail.com> > --- > drivers/clocksource/timer-tegra.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/clocksource/timer-tegra.c > b/drivers/clocksource/timer-tegra.c > index ddf5531c48a9..2673b6e0caa8 100644 > --- a/drivers/clocksource/timer-tegra.c > +++ b/drivers/clocksource/timer-tegra.c > @@ -345,6 +345,8 @@ static int __init tegra_init_timer(struct device_node > *np, bool tegra20, > irq_dispose_mapping(cpu_to->clkevt.irq); > } > } > + > + to->of_base.base = timer_reg_base; > out: > timer_of_cleanup(to);
Acked-by: Jon Hunter <jonath...@nvidia.com> Cheers Jon -- nvpublic
