Hi, Shawn

> -----Original Message-----
> From: Shawn Guo <shawn...@kernel.org>
> Sent: Tuesday, June 18, 2019 8:59 PM
> To: Anson Huang <anson.hu...@nxp.com>
> Cc: s.ha...@pengutronix.de; ker...@pengutronix.de; feste...@gmail.com;
> Leonard Crestez <leonard.cres...@nxp.com>; viresh.ku...@linaro.org;
> Abel Vesa <abel.v...@nxp.com>; linux-arm-ker...@lists.infradead.org;
> linux-kernel@vger.kernel.org; dl-linux-imx <linux-...@nxp.com>
> Subject: Re: [PATCH] soc: imx: Add i.MX8MN SoC driver support
> 
> On Tue, Jun 18, 2019 at 08:24:59AM +0000, Anson Huang wrote:
> > Hi, Shawn
> >
> > > -----Original Message-----
> > > From: Shawn Guo <shawn...@kernel.org>
> > > Sent: Tuesday, June 18, 2019 3:04 PM
> > > To: Anson Huang <anson.hu...@nxp.com>
> > > Cc: s.ha...@pengutronix.de; ker...@pengutronix.de;
> > > feste...@gmail.com; Leonard Crestez <leonard.cres...@nxp.com>;
> > > viresh.ku...@linaro.org; Abel Vesa <abel.v...@nxp.com>;
> > > linux-arm-ker...@lists.infradead.org;
> > > linux-kernel@vger.kernel.org; dl-linux-imx <linux-...@nxp.com>
> > > Subject: Re: [PATCH] soc: imx: Add i.MX8MN SoC driver support
> > >
> > > On Tue, Jun 11, 2019 at 09:31:25AM +0800, anson.hu...@nxp.com
> wrote:
> > > > From: Anson Huang <anson.hu...@nxp.com>
> > > >
> > > > This patch adds i.MX8MN SoC driver support:
> > > >
> > > > root@imx8mnevk:~# cat /sys/devices/soc0/family Freescale i.MX
> > > >
> > > > root@imx8mnevk:~# cat /sys/devices/soc0/machine NXP i.MX8MNano
> > > DDR4
> > > > EVK board
> > > >
> > > > root@imx8mnevk:~# cat /sys/devices/soc0/soc_id i.MX8MN
> > > >
> > > > root@imx8mnevk:~# cat /sys/devices/soc0/revision
> > > > 1.0
> > > >
> > > > Signed-off-by: Anson Huang <anson.hu...@nxp.com>
> > > > ---
> > > >  drivers/soc/imx/soc-imx8.c | 13 ++++++++++++-
> > > >  1 file changed, 12 insertions(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/soc/imx/soc-imx8.c
> > > > b/drivers/soc/imx/soc-imx8.c index 3842d09..02309a2 100644
> > > > --- a/drivers/soc/imx/soc-imx8.c
> > > > +++ b/drivers/soc/imx/soc-imx8.c
> > > > @@ -55,7 +55,12 @@ static u32 __init imx8mm_soc_revision(void)
> > > >         void __iomem *anatop_base;
> > > >         u32 rev;
> > > >
> > > > -       np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-anatop");
> > > > +       if (of_machine_is_compatible("fsl,imx8mm"))
> > > > +               np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-
> > > anatop");
> > > > +       else if (of_machine_is_compatible("fsl,imx8mn"))
> > > > +               np = of_find_compatible_node(NULL, NULL, "fsl,imx8mn-
> > > anatop");
> > >
> > > Can we have this anatop compatible in imx8_soc_data, so that we may
> > > save the call to of_machine_is_compatible()?
> >
> > Do you mean adding a variable like " const char *anatop_compat " in
> > imx8_soc_date structure, then initialize it according to SoC type, and
> > in imx8mm_soc_revision(), get to soc_data's anatio_compat to find the
> > anatop node? If yes, we have to add some code to get the soc_data in this
> function, or maybe we can pass anatop compatible name as .soc_revision's
> parameter?
> >
> > static const struct imx8_soc_data imx8mn_soc_data = {
> >          .name = "i.MX8MN",
> >          .soc_revision = imx8mm_soc_revision,
> >          .anatop_compat = "fsl,imx8mn-anatop", };
> 
> Okay, just realized that we only want to handle imx8mn with imx8mm
> function.  It makes less sense to add anatop compatible into imx8_soc_data
> just for that.
> 
> So it looks like that imx8mn is highly compatible with imx8mm, including
> anatop block?  If that's the case, maybe we can have compatible of imx8mn
> anatop like below, so that we can save above changes?
> 
>       compatible = "fsl,imx8mn-anatop", "fsl,imx8mm-anatop";

Make sense, I just sent out V2 with this approach, and will add the 
"fsl,imx8mm-anatop"
as i.MX8MN ANATOP fallback compatible when I need to resend the i.MX8MN DT 
patch series.

Thanks,
Anson

> 
> Shawn

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