On 24-06-19, 22:00, Saravana Kannan wrote: > All of the cases above are some real world scenarios I've come across. > CPU and L2/L3 on ARM systems are a good example of (2) but the passive > governor doesn't work with CPUs yet. But I plan to work on that later > as that's not related to this patch series.
So in case of CPUs, the cache will be the parent device and CPU be the children ? And CPUs nodes will contain the required-opps property ? -- viresh
