[PATCH 5/6] clk: imx8mq: Remove CLK_IS_CRITICAL flag for IMX8MQ_CLK_TMU_ROOT

[Anson . Huang]

From: Anson Huang <anson.hu...@nxp.com>

IMX8MQ_CLK_TMU_ROOT is ONLY used for thermal module, the driver
should manage this clock, so no need to have CLK_IS_CRITICAL flag
set.

Signed-off-by: Anson Huang <anson.hu...@nxp.com>
---
 drivers/clk/imx/clk-imx8mq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index d407a07..91de69a 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -539,7 +539,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
        clks[IMX8MQ_CLK_DISP_AXI_ROOT]  = 
imx_clk_gate2_shared2("disp_axi_root_clk", "disp_axi", base + 0x45d0, 0, 
&share_count_dcss);
        clks[IMX8MQ_CLK_DISP_APB_ROOT]  = 
imx_clk_gate2_shared2("disp_apb_root_clk", "disp_apb", base + 0x45d0, 0, 
&share_count_dcss);
        clks[IMX8MQ_CLK_DISP_RTRM_ROOT] = 
imx_clk_gate2_shared2("disp_rtrm_root_clk", "disp_rtrm", base + 0x45d0, 0, 
&share_count_dcss);
-       clks[IMX8MQ_CLK_TMU_ROOT] = imx_clk_gate4_flags("tmu_root_clk", 
"ipg_root", base + 0x4620, 0, CLK_IS_CRITICAL);
+       clks[IMX8MQ_CLK_TMU_ROOT] = imx_clk_gate4("tmu_root_clk", "ipg_root", 
base + 0x4620, 0);
        clks[IMX8MQ_CLK_VPU_DEC_ROOT] = imx_clk_gate2_flags("vpu_dec_root_clk", 
"vpu_bus", base + 0x4630, 0, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE);
        clks[IMX8MQ_CLK_CSI1_ROOT] = imx_clk_gate4("csi1_root_clk", 
"csi1_core", base + 0x4650, 0);
        clks[IMX8MQ_CLK_CSI2_ROOT] = imx_clk_gate4("csi2_root_clk", 
"csi2_core", base + 0x4660, 0);
-- 
2.7.4