On Fri, Jul 5, 2019 at 1:25 PM Thomas Gleixner <t...@linutronix.de> wrote: > > Andrew, > > > > > These can be addressed by setting TPR to 0x10, which will inhibit > > Right, that's easy and obvious. >
This boots: diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index 177aa8ef2afa..5257c40bde6c 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -1531,11 +1531,14 @@ static void setup_local_APIC(void) #endif /* - * Set Task Priority to 'accept all'. We never change this - * later on. + * Set Task Priority to 'accept all except vectors 0-31'. An APIC + * vector in the 16-31 range can be delivered otherwise, but we'll + * think it's an exception and terrible things will happen. + * We never change this later on. */ value = apic_read(APIC_TASKPRI); value &= ~APIC_TPRI_MASK; + value |= 0x10; apic_write(APIC_TASKPRI, value); apic_pending_intr_clear();