Quoting nicolas.fe...@microchip.com (2019-07-03 08:05:24)
> On 25/06/2019 at 11:10, Codrin Ciubotariu wrote:
> > In clk_generated_determine_rate(), if the divisor is greater than
> > GENERATED_MAX_DIV + 1, then the wrong best_rate will be returned.
> > If clk_generated_set_rate() will be called later with this wrong
> > rate, it will return -EINVAL, so the generated clock won't change
> > its value. Do no let the divisor be greater than GENERATED_MAX_DIV + 1.
> >
> > Fixes: 8c7aa6328947 ("clk: at91: clk-generated: remove useless divisor
> > loop")
> > Signed-off-by: Codrin Ciubotariu <codrin.ciubota...@microchip.com>
> > Acked-by: Nicolas Ferre <nicolas.fe...@microchip.com>
> > Acked-by: Ludovic Desroches <ludovic.desroc...@microchip.com>
> > ---
> >
> > - The email-server was converting my patches to base64, so I resend it
> > using another server;
> > - Added acked-bys from Nicolas and Ludovic;
>
> Stephen,
>
> I don't see this patch in linux-next and we're already late in the
> development cycle: aka ping...
>
Sorry. I dropped this one. Will pick it up into fixes.
