On Tue, Aug 06, 2019 at 04:42:20PM +0800, Chuanhua Han wrote: > Ls1088a platform, the i2c input clock is actually platform pll CLK / 8 > (this is the hardware connection), other clock divider can not get the > correct i2c clock, resulting in the output of SCL pin clock is not > accurate. > > Signed-off-by: Chuanhua Han <chuanhua....@nxp.com>
Applied all, thanks.
