Hi Andrew, Thanks a lot for your review!
Thanks, Zhiqiang > -----Original Message----- > From: Andrew Murray <[email protected]> > Sent: 2019年8月20日 17:23 > To: Z.q. Hou <[email protected]> > Cc: [email protected]; [email protected]; > [email protected]; [email protected]; > [email protected]; [email protected]; [email protected]; > [email protected]; [email protected]; Leo Li > <[email protected]>; [email protected]; M.h. Lian > <[email protected]> > Subject: Re: [PATCHv2 1/4] dt-bindings: PCI: designware: Remove the > num-lanes from Required properties > > On Tue, Aug 20, 2019 at 07:28:43AM +0000, Z.q. Hou wrote: > > From: Hou Zhiqiang <[email protected]> > > > > The num-lanes is not a mandatory property, e.g. on FSL Layerscape > > SoCs, the PCIe link training is completed automatically base on the > > selected SerDes protocol, it doesn't need the num-lanes to set-up the > > link width. > > > > It is previously in both Required and Optional properties, let's > > remove it from the Required properties. > > > > Signed-off-by: Hou Zhiqiang <[email protected]> > > --- > > Reviewed-by: Andrew Murray <[email protected]> > > > > V2: > > - Reworded the change log and subject. > > - Fixed a typo in subject. > > > > Documentation/devicetree/bindings/pci/designware-pcie.txt | 1 - > > 1 file changed, 1 deletion(-) > > > > diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt > > b/Documentation/devicetree/bindings/pci/designware-pcie.txt > > index 5561a1c060d0..bd880df39a79 100644 > > --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt > > +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt > > @@ -11,7 +11,6 @@ Required properties: > > the ATU address space. > > (The old way of getting the configuration address space from > "ranges" > > is deprecated and should be avoided.) > > -- num-lanes: number of lanes to use > > RC mode: > > - #address-cells: set to <3> > > - #size-cells: set to <2> > > -- > > 2.17.1 > >
