Am Mi., 21. Aug. 2019 um 10:07 Uhr schrieb Miroslav Lichvar <mlich...@redhat.com>: > > Currently I do not see the benefit from this. The original intention was to > > compensate for the remaining offset as good as possible. > > That's ok, but IMHO the change should not break the assumptions of > existing application and users. > > > The current code > > of phc2sys uses the delay only for the filtering of the measurement record > > with the shortest delay and for reporting and statistics. Why not simple > > shift > > the timestamps with the offset to the point where we expect the PHC > > timestamp > > to be captured, and we have a very good result compared to where we came > > from. > > Because those reports/statistics are important in calculation of > maximum error. If someone had a requirement for a clock to be accurate > to 1.5 microseconds and the ioctl returned a delay indicating a > sufficient accuracy when in reality it could be worse, that would be a > problem. > Ok, I understand your point. But including the MDIO completion into delay calculation will indicate a much wore precision as it actually is. When the MDIO driver implements the PTP system timestamping as follows ...
ptp_read_system_prets(bus->ptp_sts); writel(value, mdio-reg) ptp_read_system_postts(bus->ptp_sts); ... then we catch already the error caused by interrupts which hit the pre/post_ts section. Now we only have the additional error of one MDIO clock cycle (~400ns). Because I expect the MDIO controller to shift out the MDIO frame on the next MDIO clock cycle. So if I subtract one MDIO clock cycle from pre_ts and add one MDIO clock cycle to post_ts the error indication would be sufficiently corrected IMHO. And then we can shift both timestamps in the switch driver (in the gettimex handler) to compensate the switch depending offset. What do you think? Hubert