The following commit has been merged into the timers/core branch of tip:
Commit-ID: 4419e19d8117dda6bccfbc62090e766f469ff20a
Gitweb:
https://git.kernel.org/tip/4419e19d8117dda6bccfbc62090e766f469ff20a
Author: Anson Huang <anson.hu...@nxp.com>
AuthorDate: Thu, 15 Aug 2019 20:38:42 -04:00
Committer: Daniel Lezcano <daniel.lezc...@linaro.org>
CommitterDate: Tue, 27 Aug 2019 00:31:39 +02:00
clocksource/drivers/imx-sysctr: Add internal clock divider handle
The system counter block guide states that the base clock is
internally divided by 3 before use, that means the clock input of
system counter defined in DT should be base clock which is normally
from OSC, and then internally divided by 3 before use.
Signed-off-by: Anson Huang <anson.hu...@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezc...@linaro.org>
---
drivers/clocksource/timer-imx-sysctr.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/clocksource/timer-imx-sysctr.c
b/drivers/clocksource/timer-imx-sysctr.c
index fd7d680..b7c80a3 100644
--- a/drivers/clocksource/timer-imx-sysctr.c
+++ b/drivers/clocksource/timer-imx-sysctr.c
@@ -20,6 +20,8 @@
#define SYS_CTR_EN 0x1
#define SYS_CTR_IRQ_MASK 0x2
+#define SYS_CTR_CLK_DIV 0x3
+
static void __iomem *sys_ctr_base;
static u32 cmpcr;
@@ -134,6 +136,9 @@ static int __init sysctr_timer_init(struct device_node *np)
if (ret)
return ret;
+ /* system counter clock is divided by 3 internally */
+ to_sysctr.of_clk.rate /= SYS_CTR_CLK_DIV;
+
sys_ctr_base = timer_of_base(&to_sysctr);
cmpcr = readl(sys_ctr_base + CMPCR);
cmpcr &= ~SYS_CTR_EN;
