Just tested this on the SiFive HiFive Unleashed. Seems to work OK;
however I did not stress-test it.
Tested-by: Paul Walmsley <paul.walms...@sifive.com> # HiFive Unleashed
- Paul
# !cat
cat /proc/interrupts
CPU0 CPU1 CPU2 CPU3
1: 0 0 0 0 SiFive PLIC 5
10011000.serial
3: 0 0 0 0 SiFive PLIC 51 10040000.spi
4: 6266 0 0 0 SiFive PLIC 4
10010000.serial
5: 102 0 0 0 SiFive PLIC 6 10050000.spi
6: 37 0 0 0 SiFive PLIC 53 eth0
IPI0: 1134 21128 9024 220261 Rescheduling interrupts
IPI1: 10 143 18 7 Function call interrupts
IPI2: 0 0 0 0 CPU stop interrupts
#
