On Wed, 2019-09-18 at 16:03 +0200, Frederic Barrat wrote: > > Le 17/09/2019 à 03:42, Alastair D'Silva a écrit : > > From: Alastair D'Silva <alast...@d-silva.org> > > > > Map & release OpenCAPI LPC memory. > > > > Signed-off-by: Alastair D'Silva <alast...@d-silva.org> > > --- > > arch/powerpc/include/asm/pnv-ocxl.h | 2 ++ > > arch/powerpc/platforms/powernv/ocxl.c | 42 > > +++++++++++++++++++++++++++ > > 2 files changed, 44 insertions(+) > > > > diff --git a/arch/powerpc/include/asm/pnv-ocxl.h > > b/arch/powerpc/include/asm/pnv-ocxl.h > > index 7de82647e761..f8f8ffb48aa8 100644 > > --- a/arch/powerpc/include/asm/pnv-ocxl.h > > +++ b/arch/powerpc/include/asm/pnv-ocxl.h > > @@ -32,5 +32,7 @@ extern int pnv_ocxl_spa_remove_pe_from_cache(void > > *platform_data, int pe_handle) > > > > extern int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr); > > extern void pnv_ocxl_free_xive_irq(u32 irq); > > +extern u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 > > size); > > +extern void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev); > > > > #endif /* _ASM_PNV_OCXL_H */ > > diff --git a/arch/powerpc/platforms/powernv/ocxl.c > > b/arch/powerpc/platforms/powernv/ocxl.c > > index 8c65aacda9c8..81393728d6a3 100644 > > --- a/arch/powerpc/platforms/powernv/ocxl.c > > +++ b/arch/powerpc/platforms/powernv/ocxl.c > > @@ -475,6 +475,48 @@ void pnv_ocxl_spa_release(void *platform_data) > > } > > EXPORT_SYMBOL_GPL(pnv_ocxl_spa_release); > > > > +u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size) > > +{ > > + struct pci_controller *hose = pci_bus_to_host(pdev->bus); > > + struct pnv_phb *phb = hose->private_data; > > + struct pci_dn *pdn = pci_get_pdn(pdev); > > + u32 bdfn = (pdn->busno << 8) | pdn->devfn; > > We can spare a call to pci_get_pdn() with > bdfn = (pdev->bus->number << 8) | pdev->devfn; >
Ok. > > > + u64 base_addr = 0; > > + > > + int rc = opal_npu_mem_alloc(phb->opal_id, bdfn, size, > > &base_addr); > > + > > + WARN_ON(rc); > > Instead of a WARN, we should catch the error and return a null > address > to the caller. > base_addr will be 0 in the error case, are you suggesting we just remove the WARN_ON()? > > + > > + base_addr = be64_to_cpu(base_addr); > > + > > + rc = check_hotplug_memory_addressable(base_addr, base_addr + > > size); > > That code is missing? > That's added in the following patch on the mm list: [PATCH v3 1/2] memory_hotplug: Add a bounds check to check_hotplug_memory_range() > > > + if (rc) { > > + dev_warn(&pdev->dev, > > + "LPC memory range 0x%llx-0x%llx is not fully > > addressable", > > + base_addr, base_addr + size - 1); > > + return 0; > > + } > > + > > + > > + return base_addr; > > +} > > +EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_setup); > > + > > +void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev) > > +{ > > + struct pci_controller *hose = pci_bus_to_host(pdev->bus); > > + struct pnv_phb *phb = hose->private_data; > > + struct pci_dn *pdn = pci_get_pdn(pdev); > > + u32 bdfn; > > + int rc; > > + > > + bdfn = (pdn->busno << 8) | pdn->devfn; > > + rc = opal_npu_mem_release(phb->opal_id, bdfn); > > + WARN_ON(rc); > > Same comments as above. > > Fred > > > > > +} > > +EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_release); > > + > > + > > int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int > > pe_handle) > > { > > struct spa_data *data = (struct spa_data *) platform_data; > > -- Alastair D'Silva Open Source Developer Linux Technology Centre, IBM Australia mob: 0423 762 819