ETH_MDIO slew-rate should be set to "0" instead of "2"

Signed-off-by: Christophe Roullier <[email protected]>
---
 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi 
b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index df6470133574..7667fe758957 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -239,13 +239,18 @@
                                                 <STM32_PINMUX('C', 2, AF11)>, 
/* ETH_RGMII_TXD2 */
                                                 <STM32_PINMUX('E', 2, AF11)>, 
/* ETH_RGMII_TXD3 */
                                                 <STM32_PINMUX('B', 11, AF11)>, 
/* ETH_RGMII_TX_CTL */
-                                                <STM32_PINMUX('A', 2, AF11)>, 
/* ETH_MDIO */
                                                 <STM32_PINMUX('C', 1, AF11)>; 
/* ETH_MDC */
                                        bias-disable;
                                        drive-push-pull;
-                                       slew-rate = <3>;
+                                       slew-rate = <2>;
                                };
                                pins2 {
+                                       pinmux = <STM32_PINMUX('A', 2, AF11)>; 
/* ETH_MDIO */
+                                       bias-disable;
+                                       drive-push-pull;
+                                       slew-rate = <0>;
+                               };
+                               pins3 {
                                        pinmux = <STM32_PINMUX('C', 4, AF11)>, 
/* ETH_RGMII_RXD0 */
                                                 <STM32_PINMUX('C', 5, AF11)>, 
/* ETH_RGMII_RXD1 */
                                                 <STM32_PINMUX('B', 0, AF11)>, 
/* ETH_RGMII_RXD2 */
-- 
2.17.1

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