On Tue, 1 Oct 2019 13:54:47 +0100
Will Deacon <w...@kernel.org> wrote:
> On Mon, Sep 30, 2019 at 09:57:38AM +0800, Jia He wrote:
> > We unconditionally set the HW_AFDBM capability and only enable it on
> > CPUs which really have the feature. But sometimes we need to know
> > whether this cpu has the capability of HW AF. So decouple AF from
> > DBM by new helper cpu_has_hw_af().
> >
> > Signed-off-by: Jia He <justin...@arm.com>
> > Suggested-by: Suzuki Poulose <suzuki.poul...@arm.com>
> > Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
> > ---
> > arch/arm64/include/asm/cpufeature.h | 10 ++++++++++
> > 1 file changed, 10 insertions(+)
> >
> > diff --git a/arch/arm64/include/asm/cpufeature.h
> > b/arch/arm64/include/asm/cpufeature.h
> > index 9cde5d2e768f..949bc7c85030 100644
> > --- a/arch/arm64/include/asm/cpufeature.h
> > +++ b/arch/arm64/include/asm/cpufeature.h
> > @@ -659,6 +659,16 @@ static inline u32
> > id_aa64mmfr0_parange_to_phys_shift(int parange)
> > default: return CONFIG_ARM64_PA_BITS;
> > }
> > }
> > +
> > +/* Check whether hardware update of the Access flag is supported */
> > +static inline bool cpu_has_hw_af(void)
> > +{
> > + if (IS_ENABLED(CONFIG_ARM64_HW_AFDBM))
> > + return read_cpuid(ID_AA64MMFR1_EL1) & 0xf;
>
> 0xf? I think we should have a mask in sysreg.h for this constant.
We don't have the mask, but we certainly have the shift.
GENMASK(ID_AA64MMFR1_HADBS_SHIFT + 3, ID_AA64MMFR1_HADBS_SHIFT) is a bit
of a mouthful though. Ideally, we'd have a helper for that.
M.
--
Without deviation from the norm, progress is not possible.
