Hi Jonathan, Jonathan Cameron <ji...@kernel.org> wrote on Sun, 6 Oct 2019 11:18:37 +0100:
> On Thu, 3 Oct 2019 19:33:56 +0200 > Miquel Raynal <miquel.ray...@bootlin.com> wrote: > > > The chip has a 'start conversion' and a 'end of conversion' pair of > > pins. They can be used but this is absolutely not mandatory as regular > > polling of the value is totally fine with the current internal > > clocking setup. Turn the interrupts optional and do not error out if > > they are not inquired in the device tree. This has the effect to > > prevent triggered buffers use though. > > > > Signed-off-by: Miquel Raynal <miquel.ray...@bootlin.com> > > Hmm. I haven't looked a this in a great deal of depth but if we support > single channel reads it should be possible to allow the use of a > trigger from elsewhere. Looks like a fair bit of new code would be needed > to support that though. So perhaps this is a good first step. > > It's a bit annoying that the hardware doesn't provide a EOC bit > anywhere in the registers. That would have allowed us to be a bit > cleverer. I totally agree. Actually, this chip does not support any 'register read', the only things we can read are measures (temperature/voltages). Thanks, Miquèl