The following commit has been merged into the x86/urgent branch of tip: Commit-ID: 454de1e7d970d6bc567686052329e4814842867c Gitweb: https://git.kernel.org/tip/454de1e7d970d6bc567686052329e4814842867c Author: Janakarajan Natarajan <janakarajan.natara...@amd.com> AuthorDate: Mon, 07 Oct 2019 19:00:22 Committer: Ingo Molnar <mi...@kernel.org> CommitterDate: Tue, 08 Oct 2019 13:25:24 +02:00
x86/asm: Fix MWAITX C-state hint value As per "AMD64 Architecture Programmer's Manual Volume 3: General-Purpose and System Instructions", MWAITX EAX[7:4]+1 specifies the optional hint of the optimized C-state. For C0 state, EAX[7:4] should be set to 0xf. Currently, a value of 0xf is set for EAX[3:0] instead of EAX[7:4]. Fix this by changing MWAITX_DISABLE_CSTATES from 0xf to 0xf0. This hasn't had any implications so far because setting reserved bits in EAX is simply ignored by the CPU. [ bp: Fixup comment in delay_mwaitx() and massage. ] Signed-off-by: Janakarajan Natarajan <janakarajan.natara...@amd.com> Signed-off-by: Borislav Petkov <b...@suse.de> Cc: Frederic Weisbecker <frede...@kernel.org> Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org> Cc: "H. Peter Anvin" <h...@zytor.com> Cc: Ingo Molnar <mi...@redhat.com> Cc: Thomas Gleixner <t...@linutronix.de> Cc: "x...@kernel.org" <x...@kernel.org> Cc: Zhenzhong Duan <zhenzhong.d...@oracle.com> Cc: <sta...@vger.kernel.org> Link: https://lkml.kernel.org/r/20191007190011.4859-1-janakarajan.natara...@amd.com Signed-off-by: Ingo Molnar <mi...@kernel.org> --- arch/x86/include/asm/mwait.h | 2 +- arch/x86/lib/delay.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/include/asm/mwait.h b/arch/x86/include/asm/mwait.h index e28f8b7..9d5252c 100644 --- a/arch/x86/include/asm/mwait.h +++ b/arch/x86/include/asm/mwait.h @@ -21,7 +21,7 @@ #define MWAIT_ECX_INTERRUPT_BREAK 0x1 #define MWAITX_ECX_TIMER_ENABLE BIT(1) #define MWAITX_MAX_LOOPS ((u32)-1) -#define MWAITX_DISABLE_CSTATES 0xf +#define MWAITX_DISABLE_CSTATES 0xf0 static inline void __monitor(const void *eax, unsigned long ecx, unsigned long edx) diff --git a/arch/x86/lib/delay.c b/arch/x86/lib/delay.c index b7375dc..c126571 100644 --- a/arch/x86/lib/delay.c +++ b/arch/x86/lib/delay.c @@ -113,8 +113,8 @@ static void delay_mwaitx(unsigned long __loops) __monitorx(raw_cpu_ptr(&cpu_tss_rw), 0, 0); /* - * AMD, like Intel, supports the EAX hint and EAX=0xf - * means, do not enter any deep C-state and we use it + * AMD, like Intel's MWAIT version, supports the EAX hint and + * EAX=0xf0 means, do not enter any deep C-state and we use it * here in delay() to minimize wakeup latency. */ __mwaitx(MWAITX_DISABLE_CSTATES, delay, MWAITX_ECX_TIMER_ENABLE);
