Hi Rob, Thank you so much for the review. Please find my comments inline below.
Thanks, Manish > -----Original Message----- > From: Rob Herring <r...@kernel.org> > Sent: Thursday, October 17, 2019 11:53 PM > To: Manish Narani <mnar...@xilinx.com> > Cc: ulf.hans...@linaro.org; mark.rutl...@arm.com; adrian.hun...@intel.com; > Michal Simek <mich...@xilinx.com>; Jolly Shah <jol...@xilinx.com>; Rajan > Vaja <raj...@xilinx.com>; Nava kishore Manne <na...@xilinx.com>; > m...@kernel.org; linux-...@vger.kernel.org; devicet...@vger.kernel.org; > linux-kernel@vger.kernel.org; linux-arm-ker...@lists.infradead.org; git > <g...@xilinx.com> > Subject: Re: [PATCH v3 4/8] dt-bindings: mmc: arasan: Add optional properties > for Arasan SDHCI > > On Thu, Oct 17, 2019 at 11:51:46AM +0530, Manish Narani wrote: > > Add optional propeties for Arasan SDHCI which are used to set clk delays > > properties > > > for different speed modes in the controller. > > > > Signed-off-by: Manish Narani <manish.nar...@xilinx.com> > > --- > > .../devicetree/bindings/mmc/arasan,sdhci.txt | 15 +++++++++++++++ > > 1 file changed, 15 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > > index b51e40b2e0c5..e0369dd7fb18 100644 > > --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > > +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt > > @@ -46,6 +46,21 @@ Optional Properties: > > properly. Test mode can be used to force the controller to function. > > - xlnx,int-clock-stable-broken: when present, the controller always > > reports > > that the internal clock is stable even when it is not. > > + - clk-phase-legacy: Input/Output Clock Delay pair in degrees for Legacy > Mode. > > + - clk-phase-mmc-hs: Input/Output Clock Delay pair degrees for MMC HS. > > + - clk-phase-sd-hs: Input/Output Clock Delay pair in degrees for SD HS. > > + - clk-phase-uhs-sdr12: Input/Output Clock Delay pair in degrees for > > SDR12. > > + - clk-phase-uhs-sdr25: Input/Output Clock Delay pair in degrees for > > SDR25. > > + - clk-phase-uhs-sdr50: Input/Output Clock Delay pair in degrees for > > SDR50. > > + - clk-phase-uhs-sdr104: Input/Output Clock Delay pair in degrees for > SDR104. > > + - clk-phase-uhs-ddr50: Input/Output Clock Delay pair in degrees for SD > DDR50. > > + - clk-phase-mmc-ddr52: Input/Output Clock Delay pair in degrees for MMC > DDR52. > > + - clk-phase-mmc-hs200: Input/Output Clock Delay pair in degrees for MMC > HS200. > > + - clk-phase-mmc-hs400: Input/Output Clock Delay pair in degrees for MMC > HS400. > > Should be common? Yes, these properties should be common. > > Range of values? As these values are in degrees, the range of values is 0 to 359 degrees. Thanks, Manish
