On 21/10/19 18:06, Like Xu wrote: > > + __set_bit(INTEL_PMC_IDX_FIXED + i, pmu->pmc_in_use); > reprogram_fixed_counter(pmc, new_ctrl, i); > } > > @@ -329,6 +330,11 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) > (boot_cpu_has(X86_FEATURE_HLE) || boot_cpu_has(X86_FEATURE_RTM)) && > (entry->ebx & (X86_FEATURE_HLE|X86_FEATURE_RTM))) > pmu->reserved_bits ^= HSW_IN_TX|HSW_IN_TX_CHECKPOINTED; > + > + bitmap_set(pmu->all_valid_pmc_idx, > + 0, pmu->nr_arch_gp_counters); > + bitmap_set(pmu->all_valid_pmc_idx, > + INTEL_PMC_MAX_GENERIC, pmu->nr_arch_fixed_counters);
The offset needs to be INTEL_PMC_IDX_FIXED for GP counters, and 0 for fixed counters, otherwise pmc_in_use and all_valid_pmc_idx are not in sync. Paolo
