On 22/10/19 14:00, Like Xu wrote: > > Second, the structure of pmu->pmc_in_use is in the following format: > > Intel: [0 .. INTEL_PMC_MAX_GENERIC-1] <=> gp counters > [INTEL_PMC_IDX_FIXED .. INTEL_PMC_IDX_FIXED + 2] <=> fixed > AMD: [0 .. AMD64_NUM_COUNTERS-1] <=> gp counters
Sorry---I confused INTEL_PMC_MAX_FIXED and INTEL_PMC_IDX_FIXED. The patches look good, I'll give them another look since I obviously wasn't very much awake when reviewing them. Paolo
