On Fri, May 15, 2020 at 01:47:44PM +0300, Serge Semin wrote: > It's pointless to track the Tx overrun interrupts if Rx-only SPI > transfer is issued. Similarly there is no need in handling the Rx > overrun/underrun interrupts if Tx-only SPI transfer is executed. > So lets unmask the interrupts only if corresponding SPI > transactions are implied.
My comments below. > Co-developed-by: Georgy Vlasov <[email protected]> > Signed-off-by: Georgy Vlasov <[email protected]> > Signed-off-by: Serge Semin <[email protected]> > Cc: Ramil Zaripov <[email protected]> > Cc: Alexey Malahov <[email protected]> > Cc: Thomas Bogendoerfer <[email protected]> > Cc: Paul Burton <[email protected]> > Cc: Ralf Baechle <[email protected]> > Cc: Arnd Bergmann <[email protected]> > Cc: Allison Randal <[email protected]> > Cc: Andy Shevchenko <[email protected]> > Cc: Gareth Williams <[email protected]> > Cc: Rob Herring <[email protected]> > Cc: [email protected] > Cc: [email protected] I think you really need to revisit Cc list in all patches (DT people hardly interested in this one, though ones where properties are being used might be point of interest). ... > /* Set the interrupt mask */ > - spi_umask_intr(dws, SPI_INT_TXOI | SPI_INT_RXUI | SPI_INT_RXOI); > + spi_umask_intr(dws, imr); Can we rather do like this /* Set the interrupt mask */ if (xfer->tx_buf) imr |= SPI_INT_TXOI; if (xfer->rx_buf) imr |= SPI_INT_RXUI | SPI_INT_RXOI; spi_umask_intr(dws, imr); ? (First block sets DMA, second one IRQ) -- With Best Regards, Andy Shevchenko
