On 5/19/2020 9:17 AM, Marc Zyngier wrote:
> For as long as SMP ARM has existed, IPIs have been handled as
> something special. The arch code and the interrupt controller exchange
> a couple of hooks (one to generate an IPI, another to handle it).
>
> Although this is perfectly manageable, it prevents the use of features
> that we could use if IPIs were Linux IRQs (such as pseudo-NMIs). It
> also means that each interrupt controller driver has to follow an
> architecture-specific interface instead of just implementing the base
> irqchip functionnalities. The arch code also duplicates a number of
> things that the core irq code already does (such as calling
> set_irq_regs(), irq_enter()...).
>
> This series tries to remedy this on arm/arm64 by offering a new
> registration interface where the irqchip gives the arch code a range
> of interrupts to use for IPIs. The arch code requests these as normal
> interrupts.
>
> The bulk of the work is at the interrupt controller level, where all 3
> irqchips used on arm64 get converted.
>
> Finally, the arm64 code drops the legacy registration interface. The
> same thing could be done on 32bit as well once the two remaining
> irqchips using that interface get converted.
>
> There is probably more that could be done: statistics are still
> architecture-private code, for example, and no attempt is made to
> solve that (apart from hidding the IRQs from /proc/interrupt).
>
> This has been tested on a bunch of 32 and 64bit guests.
Does this patch series change your position on this patch series
https://lore.kernel.org/linux-arm-kernel/20191023000547.7831-3-f.faine...@gmail.com/T/
or is this still a no-no?
>
> Marc Zyngier (11):
> genirq: Add fasteoi IPI flow
> genirq: Allow interrupts to be excluded from /proc/interrupts
> arm64: Allow IPIs to be handled as normal interrupts
> ARM: Allow IPIs to be handled as normal interrupts
> irqchip/gic-v3: Describe the SGI range
> irqchip/gic-v3: Configure SGIs as standard interrupts
> irqchip/gic: Refactor SMP configuration
> irqchip/gic: Configure SGIs as standard interrupts
> irqchip/gic-common: Don't enable SGIs by default
> irqchip/bcm2836: Configure mailbox interrupts as standard interrupts
> arm64: Kill __smp_cross_call and co
>
> arch/arm/Kconfig | 1 +
> arch/arm/include/asm/smp.h | 5 +
> arch/arm/kernel/smp.c | 97 +++++++++++---
> arch/arm64/Kconfig | 1 +
> arch/arm64/include/asm/irq_work.h | 4 +-
> arch/arm64/include/asm/smp.h | 6 +-
> arch/arm64/kernel/smp.c | 98 +++++++++++----
> drivers/irqchip/irq-bcm2836.c | 151 ++++++++++++++++++----
> drivers/irqchip/irq-gic-common.c | 3 -
> drivers/irqchip/irq-gic-v3.c | 109 ++++++++++------
> drivers/irqchip/irq-gic.c | 203 ++++++++++++++++++------------
> include/linux/irq.h | 4 +-
> kernel/irq/chip.c | 26 ++++
> kernel/irq/debugfs.c | 1 +
> kernel/irq/proc.c | 2 +-
> kernel/irq/settings.h | 7 ++
> 16 files changed, 515 insertions(+), 203 deletions(-)
>
--
Florian
