Re: [PATCH v2 5/6] irqchip: Add Loongson PCH MSI controller

[Jiaxun Yang]

于 2020年5月13日 GMT+08:00 下午8:15:40, Thomas Gleixner <t...@linutronix.de> 写到:
>Thomas Gleixner <t...@linutronix.de> writes:
>> Jiaxun Yang <jiaxun.y...@flygoat.com> writes:
>>> +
>>> +struct pch_msi_data {
>>> +   spinlock_t              msi_map_lock;
>>> +   phys_addr_t             doorbell;
>>> +   u32                     irq_first;      /* The vector number that MSIs 
>>> starts */
>>> +   u32                     num_irqs;       /* The number of vectors for 
>>> MSIs */
>>> +   unsigned long           *msi_map;
>>> +};
>>> +
>>> +static void pch_msi_mask_msi_irq(struct irq_data *d)
>>> +{
>>> +   pci_msi_mask_irq(d);
>>> +   irq_chip_mask_parent(d);
>>> +}
>>> +
>>> +static void pch_msi_unmask_msi_irq(struct irq_data *d)
>>> +{
>>> +   pci_msi_unmask_irq(d);
>>> +   irq_chip_unmask_parent(d);
>>
>> The ordering of mask and unmask is assymetric. That does not make sense.
>>
>>> +static struct msi_domain_info pch_msi_domain_info = {
>>> +   .flags          = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
>>> +                     MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX,
>>> +   .chip   = &pch_msi_irq_chip,
>>
>> Please maintain tabular layout.
>
>Ooops. Wanted to reply to V3, but the comments are valid for V3 as well.

All fixed in v4.

Please review.

Thanks!


>
>Thanks,
>
>        tglx

-- 
Jiaxun Yang