All IRQs that can be used to wake up the system must be routed through
r_intc, so they are visible to firmware while the system is suspended.

For the A64, r_intc IRQ numbers are offset by 32 from the GIC IRQ
numbers.

Signed-off-by: Samuel Holland <sam...@sholland.org>
---
 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi 
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index c26cc1fcaffd..33f2ce0d93aa 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -1176,8 +1176,9 @@ rtc: rtc@1f00000 {
                        compatible = "allwinner,sun50i-a64-rtc",
                                     "allwinner,sun8i-h3-rtc";
                        reg = <0x01f00000 0x400>;
-                       interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-parent = <&r_intc>;
+                       interrupts = <8 IRQ_TYPE_LEVEL_HIGH>,
+                                    <9 IRQ_TYPE_LEVEL_HIGH>;
                        clock-output-names = "osc32k", "osc32k-out", "iosc";
                        clocks = <&osc32k>;
                        #clock-cells = <1>;
@@ -1227,7 +1228,8 @@ r_ir: ir@1f02000 {
                        clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>;
                        clock-names = "apb", "ir";
                        resets = <&r_ccu RST_APB0_IR>;
-                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-parent = <&r_intc>;
+                       interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
                        pinctrl-names = "default";
                        pinctrl-0 = <&r_ir_rx_pin>;
                        status = "disabled";
@@ -1247,7 +1249,8 @@ r_pwm: pwm@1f03800 {
                r_pio: pinctrl@1f02c00 {
                        compatible = "allwinner,sun50i-a64-r-pinctrl";
                        reg = <0x01f02c00 0x400>;
-                       interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-parent = <&r_intc>;
+                       interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
-- 
2.24.1

Reply via email to