Hi Stephan,
Thanks for the review.
> ------Original Message------
> From: Stephen Boyd <[email protected]>
> Sent: Tuesday, May 26, 2020 6:08PM
> To: Jolly Shah <[email protected]>, Arm <[email protected]>,
Linux-clk <[email protected]>, Michal Simek
<[email protected]>, Mturquette <[email protected]>, Olof
<[email protected]>
> Cc: Rajan Vaja <[email protected]>,
[email protected]
<[email protected]>, [email protected]
<[email protected]>, Tejas Patel <[email protected]>,
Rajan Vaja <[email protected]>, Jolly Shah <[email protected]>
> Subject: Re: [PATCH v2 2/2] drivers: clk: zynqmp: Update fraction
clock check from custom type flags
>
Quoting Jolly Shah (2020-03-12 14:31:39)
From: Tejas Patel <[email protected]>
Older firmware version sets BIT(13) in clkflag to mark a
divider as fractional divider. Updated firmware version sets BIT(4)
in type flags to mark a divider as fractional divider since
BIT(13) is defined as CLK_DUTY_CYCLE_PARENT in the common clk
framework flags.
To support both old and new firmware version, consider BIT(13) from
clkflag and BIT(4) from type_flag to check if divider is fractional
or not.
To maintain compatibility BIT(13) of clkflag in firmware will not be
used in future for any purpose and will be marked as unused.
Why are we mixing the firmware flags with the ccf flags? They shouldn't
be the same. The firmware should have its own 'flag numberspace' that is
distinct from the common clk framework's 'flag numberspace'. Please fix
the code.
Yes firmware flags are using separate numberspace now. Firmware
maintains CCF and firmware specific flags separately but earlier
CLK_FRAC was mistakenly defined in ccf flagspace and hence handled here
for backward compatibility. Driver takes care of not registering same
with CCF. Let me know if I misunderstood.
Thanks,
Jolly Shah
