Disable fast switch when the opp-tables required for scaling DDR/L3 are populated.
Reviewed-by: Matthias Kaehlcke <m...@chromium.org> Signed-off-by: Sibi Sankar <si...@codeaurora.org> --- v7: * Picked up R-b from Matthias v6: * No change v5: * Drop dev_pm_opp_get_path_count [Saravana] drivers/cpufreq/qcom-cpufreq-hw.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c index aaf98333d37da..fa68fa8ebd95e 100644 --- a/drivers/cpufreq/qcom-cpufreq-hw.c +++ b/drivers/cpufreq/qcom-cpufreq-hw.c @@ -159,6 +159,7 @@ static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev, dev_err(cpu_dev, "Invalid opp table in device tree\n"); return ret; } else { + policy->fast_switch_possible = true; icc_scaling_enabled = false; } @@ -308,8 +309,6 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy) dev_pm_opp_of_register_em(policy->cpus); - policy->fast_switch_possible = true; - return 0; error: devm_iounmap(dev, base); -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project