On Fri, 10 Jul 2020 at 01:14, Andrew Jeffery <[email protected]> wrote: > > > > On Fri, 10 Jul 2020, at 05:27, Eddie James wrote: > > When calculating the clock divider, start dividing at 2 instead of 1. > > The divider is divided by two at the end of the calculation, so starting > > at 1 may result in a divider of 0, which shouldn't happen. > > > > Signed-off-by: Eddie James <[email protected]> > > Reviewed-by: Andrew Jeffery <[email protected]>
Acked-by: Joel Stanley <[email protected]> Fixes: d3d04f6c330a ("clk: Add support for AST2600 SoC") Stephen, I think this should go to stable too along with 1/2. Cheers, Joel
