Address of Interrupt control registers are different on new chipsets.
So move them to SoC specific data structure.

Signed-off-by: Dilip Kota <eswara.k...@linux.intel.com>
---
 drivers/spi/spi-lantiq-ssc.c | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/spi/spi-lantiq-ssc.c b/drivers/spi/spi-lantiq-ssc.c
index 1073a70a4beba..98e1c5d807597 100644
--- a/drivers/spi/spi-lantiq-ssc.c
+++ b/drivers/spi/spi-lantiq-ssc.c
@@ -50,8 +50,6 @@
 #define LTQ_SPI_RXCNT          0x84
 #define LTQ_SPI_DMACON         0xec
 #define LTQ_SPI_IRNEN          0xf4
-#define LTQ_SPI_IRNICR         0xf8
-#define LTQ_SPI_IRNCR          0xfc
 
 #define LTQ_SPI_CLC_SMC_S      16      /* Clock divider for sleep mode */
 #define LTQ_SPI_CLC_SMC_M      (0xFF << LTQ_SPI_CLC_SMC_S)
@@ -159,8 +157,10 @@
 #define LTQ_SPI_IRNEN_ALL      0x1F
 
 struct lantiq_ssc_hwcfg {
-       unsigned int irnen_r;
-       unsigned int irnen_t;
+       unsigned int    irnen_r;
+       unsigned int    irnen_t;
+       unsigned int    irncr;
+       unsigned int    irnicr;
 };
 
 struct lantiq_ssc_spi {
@@ -793,13 +793,17 @@ static int lantiq_ssc_transfer_one(struct spi_master 
*master,
 }
 
 static const struct lantiq_ssc_hwcfg lantiq_ssc_xway = {
-       .irnen_r = LTQ_SPI_IRNEN_R_XWAY,
-       .irnen_t = LTQ_SPI_IRNEN_T_XWAY,
+       .irnen_r        = LTQ_SPI_IRNEN_R_XWAY,
+       .irnen_t        = LTQ_SPI_IRNEN_T_XWAY,
+       .irnicr         = 0xF8,
+       .irncr          = 0xFC,
 };
 
 static const struct lantiq_ssc_hwcfg lantiq_ssc_xrx = {
-       .irnen_r = LTQ_SPI_IRNEN_R_XRX,
-       .irnen_t = LTQ_SPI_IRNEN_T_XRX,
+       .irnen_r        = LTQ_SPI_IRNEN_R_XRX,
+       .irnen_t        = LTQ_SPI_IRNEN_T_XRX,
+       .irnicr         = 0xF8,
+       .irncr          = 0xFC,
 };
 
 static const struct of_device_id lantiq_ssc_match[] = {
-- 
2.11.0

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