Hi,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on char-misc/char-misc-testing]
[also build test WARNING on soc/for-next linus/master v5.9-rc3 next-20200828]
[cannot apply to linux/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    
https://github.com/0day-ci/linux/commits/ricky_wu-realtek-com/misc-rtsx-add-power-saving-function-and-bios-guide-options/20200901-103534
base:   https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git 
dd5597245d35cfbb0890b8a868028aa1d2018701
config: ia64-randconfig-r005-20200831 (attached as .config)
compiler: ia64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross 
ARCH=ia64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <l...@intel.com>

All warnings (new ones prefixed by >>):

   In file included from arch/ia64/include/asm/pgtable.h:154,
                    from include/linux/pgtable.h:6,
                    from arch/ia64/include/asm/uaccess.h:40,
                    from include/linux/uaccess.h:9,
                    from arch/ia64/include/asm/sections.h:11,
                    from include/linux/interrupt.h:20,
                    from include/linux/pci.h:38,
                    from include/linux/rtsx_pci.h:14,
                    from drivers/misc/cardreader/rts5249.c:12:
   arch/ia64/include/asm/mmu_context.h: In function 'reload_context':
   arch/ia64/include/asm/mmu_context.h:137:41: warning: variable 'old_rr4' set 
but not used [-Wunused-but-set-variable]
     137 |  unsigned long rr0, rr1, rr2, rr3, rr4, old_rr4;
         |                                         ^~~~~~~
   drivers/misc/cardreader/rts5249.c: In function 
'rts52xa_save_content_from_efuse':
>> drivers/misc/cardreader/rts5249.c:157:14: warning: variable 'cv' set but not 
>> used [-Wunused-but-set-variable]
     157 |  u8 cnt, sv, cv;
         |              ^~

# 
https://github.com/0day-ci/linux/commit/7f37b141bf20205913d0efbf1bca25e323489b6b
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
ricky_wu-realtek-com/misc-rtsx-add-power-saving-function-and-bios-guide-options/20200901-103534
git checkout 7f37b141bf20205913d0efbf1bca25e323489b6b
vim +/cv +157 drivers/misc/cardreader/rts5249.c

   154  
   155  static void rts52xa_save_content_from_efuse(struct rtsx_pcr *pcr)
   156  {
 > 157          u8 cnt, sv, cv;
   158          u8 j = 0;
   159          u8 tmp;
   160          u8 val;
   161          int i;
   162  
   163          rtsx_pci_write_register(pcr, RTS524A_PME_FORCE_CTL,
   164                                  REG_EFUSE_BYPASS | REG_EFUSE_POR, 
REG_EFUSE_POR);
   165          udelay(1);
   166  
   167          pcr_dbg(pcr, "Enable efuse por!");
   168          pcr_dbg(pcr, "save efuse to autoload");
   169  
   170          rtsx_pci_write_register(pcr, RTS525A_EFUSE_ADD, 
REG_EFUSE_ADD_MASK, 0x00);
   171          rtsx_pci_write_register(pcr, RTS525A_EFUSE_CTL,
   172                                  REG_EFUSE_ENABLE | REG_EFUSE_MODE, 
REG_EFUSE_ENABLE);
   173          /* Wait transfer end */
   174          for (j = 0; j < 1024; j++) {
   175                  rtsx_pci_read_register(pcr, RTS525A_EFUSE_CTL, &tmp);
   176                  if ((tmp & 0x80) == 0)
   177                          break;
   178          }
   179          rtsx_pci_read_register(pcr, RTS525A_EFUSE_DATA, &val);
   180          cnt = val & 0x0F;
   181          sv = val & 0x10;
   182          cv = val & 0x20;
   183  
   184          if (sv) {
   185                  for (i = 0; i < 4; i++) {
   186                          rtsx_pci_write_register(pcr, RTS525A_EFUSE_ADD,
   187                                  REG_EFUSE_ADD_MASK, 0x04 + i);
   188                          rtsx_pci_write_register(pcr, RTS525A_EFUSE_CTL,
   189                                  REG_EFUSE_ENABLE | REG_EFUSE_MODE, 
REG_EFUSE_ENABLE);
   190                          /* Wait transfer end */
   191                          for (j = 0; j < 1024; j++) {
   192                                  rtsx_pci_read_register(pcr, 
RTS525A_EFUSE_CTL, &tmp);
   193                                  if ((tmp & 0x80) == 0)
   194                                          break;
   195                          }
   196                          rtsx_pci_read_register(pcr, RTS525A_EFUSE_DATA, 
&val);
   197                          rtsx_pci_write_register(pcr, 0xFF04 + i, 0xFF, 
val);
   198                  }
   199          } else {
   200                  rtsx_pci_write_register(pcr, 0xFF04, 0xFF, 
(u8)PCI_VID(pcr));
   201                  rtsx_pci_write_register(pcr, 0xFF05, 0xFF, 
(u8)(PCI_VID(pcr) >> 8));
   202                  rtsx_pci_write_register(pcr, 0xFF06, 0xFF, 
(u8)PCI_PID(pcr));
   203                  rtsx_pci_write_register(pcr, 0xFF07, 0xFF, 
(u8)(PCI_PID(pcr) >> 8));
   204          }
   205  
   206          for (i = 0; i < cnt * 4; i++) {
   207                  if (sv)
   208                          rtsx_pci_write_register(pcr, RTS525A_EFUSE_ADD,
   209                                  REG_EFUSE_ADD_MASK, 0x08 + i);
   210                  else
   211                          rtsx_pci_write_register(pcr, RTS525A_EFUSE_ADD,
   212                                  REG_EFUSE_ADD_MASK, 0x04 + i);
   213                  rtsx_pci_write_register(pcr, RTS525A_EFUSE_CTL,
   214                                  REG_EFUSE_ENABLE | REG_EFUSE_MODE, 
REG_EFUSE_ENABLE);
   215                  /* Wait transfer end */
   216                  for (j = 0; j < 1024; j++) {
   217                          rtsx_pci_read_register(pcr, RTS525A_EFUSE_CTL, 
&tmp);
   218                          if ((tmp & 0x80) == 0)
   219                                  break;
   220                  }
   221                  rtsx_pci_read_register(pcr, RTS525A_EFUSE_DATA, &val);
   222                  rtsx_pci_write_register(pcr, 0xFF08 + i, 0xFF, val);
   223          }
   224          rtsx_pci_write_register(pcr, 0xFF00, 0xFF, (cnt & 0x7F) | 0x80);
   225          rtsx_pci_write_register(pcr, RTS524A_PME_FORCE_CTL,
   226                  REG_EFUSE_BYPASS | REG_EFUSE_POR, REG_EFUSE_BYPASS);
   227          pcr_dbg(pcr, "Disable efuse por!");
   228  }
   229  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org

Attachment: .config.gz
Description: application/gzip

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