The SPI-NOR flash on the SoM was missing from the device tree.

Signed-off-by: Matthias Schiffer <matthias.schif...@ew.tq-group.com>
---
 arch/arm/boot/dts/imx7-tqma7.dtsi | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/arch/arm/boot/dts/imx7-tqma7.dtsi 
b/arch/arm/boot/dts/imx7-tqma7.dtsi
index 8773344b54aa..fd23f764399a 100644
--- a/arch/arm/boot/dts/imx7-tqma7.dtsi
+++ b/arch/arm/boot/dts/imx7-tqma7.dtsi
@@ -160,6 +160,20 @@
                >;
        };
 
+       pinctrl_qspi: qspigrp {
+               fsl,pins = <
+                       MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0      0x5A
+                       MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1      0x5A
+                       MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2      0x5A
+                       MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3      0x5A
+                       MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK       0x11
+                       MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B      0x54
+                       MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B      0x54
+                       /* #QSPI_RESET */
+                       MX7D_PAD_EPDC_DATA04__GPIO2_IO4         0x40000052
+               >;
+       };
+
        pinctrl_usdhc3: usdhc3grp {
                fsl,pins = <
                        MX7D_PAD_SD3_CMD__SD3_CMD               0x59
@@ -217,6 +231,22 @@
        };
 };
 
+&qspi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_qspi>;
+       status = "okay";
+
+       flash0: spinor@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "jedec,spi-nor";
+               spi-max-frequency = <29000000>;
+               spi-rx-bus-width = <4>;
+               spi-tx-bus-width = <4>;
+               reg = <0>;
+       };
+};
+
 &sdma {
        status = "okay";
 };
-- 
2.17.1

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