Quoting Tero Kristo (2020-09-07 01:57:38)
> The DT clock probe loop incorrectly terminates after processing "clocks"
> only, fix this by re-starting the loop when all entries for current
> DT property have been parsed.
>
> Fixes: 8e48b33f9def ("clk: keystone: sci-clk: probe clocks from DT instead of
> firmware")
> Reported-by: Peter Ujfalusi <[email protected]>
> Signed-off-by: Tero Kristo <[email protected]>
> ---Applied to clk-next
