Defines macros for operation packet header and formats (support sub classes for 'other', 'branch', 'load and store', etc). Uses these macros for operation packet decoding and dumping.
Signed-off-by: Leo Yan <[email protected]> --- .../arm-spe-decoder/arm-spe-pkt-decoder.c | 31 +++++++++------- .../arm-spe-decoder/arm-spe-pkt-decoder.h | 36 +++++++++++++++++++ 2 files changed, 54 insertions(+), 13 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index b8f343320abf..a848c784f4cf 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -142,7 +142,7 @@ static int arm_spe_get_op_type(const unsigned char *buf, size_t len, struct arm_spe_pkt *packet) { packet->type = ARM_SPE_OP_TYPE; - packet->index = buf[0] & 0x3; + packet->index = buf[0] & SPE_OP_PKT_HDR_CLASS_MASK; return arm_spe_get_payload(buf, len, 0, packet); } @@ -345,32 +345,36 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, case ARM_SPE_OP_TYPE: switch (idx) { - case 0: + case SPE_OP_PKT_HDR_CLASS_OTHER: return arm_spe_pkt_snprintf(&buf, &blen, - payload & 0x1 ? "COND-SELECT" : "INSN-OTHER"); - case 1: + payload & SPE_OP_PKT_OTHER_SUBCLASS_COND ? + "COND-SELECT" : "INSN-OTHER"); + case SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC: ret = arm_spe_pkt_snprintf(&buf, &blen, - payload & 0x1 ? "ST" : "LD"); + payload & SPE_OP_PKT_LDST ? + "ST" : "LD"); if (ret < 0) return ret; - if (payload & 0x2) { - if (payload & 0x4) { + if ((payload & SPE_OP_PKT_LDST_SUBCLASS_ATOMIC_MASK) == + SPE_OP_PKT_LDST_SUBCLASS_ATOMIC) { + if (payload & SPE_OP_PKT_AT) { ret = arm_spe_pkt_snprintf(&buf, &blen, " AT"); if (ret < 0) return ret; } - if (payload & 0x8) { + if (payload & SPE_OP_PKT_EXCL) { ret = arm_spe_pkt_snprintf(&buf, &blen, " EXCL"); if (ret < 0) return ret; } - if (payload & 0x10) { + if (payload & SPE_OP_PKT_AR) { ret = arm_spe_pkt_snprintf(&buf, &blen, " AR"); if (ret < 0) return ret; } - } else if (payload & 0x4) { + } else if ((payload & SPE_OP_PKT_LDST_SUBCLASS_MASK) == + SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP) { ret = arm_spe_pkt_snprintf(&buf, &blen, " SIMD-FP"); if (ret < 0) return ret; @@ -378,17 +382,18 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, return buf_len - blen; - case 2: + case SPE_OP_PKT_HDR_CLASS_BR_ERET: ret = arm_spe_pkt_snprintf(&buf, &blen, "B"); if (ret < 0) return ret; - if (payload & 0x1) { + if (payload & SPE_OP_PKT_BRANCH_SUBCLASS_COND) { ret = arm_spe_pkt_snprintf(&buf, &blen, " COND"); if (ret < 0) return ret; } - if (payload & 0x2) { + if ((payload & SPE_OP_PKT_BRANCH_SUBCLASS_MASK) == + SPE_OP_PKT_BRANCH_SUBCLASS_INDIRECT) { ret = arm_spe_pkt_snprintf(&buf, &blen, " IND"); if (ret < 0) return ret; diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h index e9a88cf685bb..2c4086bf3149 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h @@ -114,6 +114,42 @@ struct arm_spe_pkt { #define SPE_EVT_PKT_ARCH_RETIRED BIT(1) #define SPE_EVT_PKT_GEN_EXCEPTION BIT(0) +/* Operation packet header */ +#define SPE_OP_PKT_HDR_CLASS_MASK GENMASK_ULL(2, 0) +#define SPE_OP_PKT_HDR_CLASS_OTHER (0x0) +#define SPE_OP_PKT_HDR_CLASS_LD_ST_ATOMIC (0x1) +#define SPE_OP_PKT_HDR_CLASS_BR_ERET (0x2) + +#define SPE_OP_PKT_OTHER_SUBCLASS_MASK GENMASK_ULL(7, 1) +#define SPE_OP_PKT_OTHER_SUBCLASS_OTHER_OP (0x0) +#define SPE_OP_PKT_OTHER_SVE_SUBCLASS_MASK (BIT(7) | BIT(3) | BIT(0)) +#define SPE_OP_PKT_OTHER_SUBCLASS_SVG_OP (0x8) + +#define SPE_OP_PKT_OTHER_SUBCLASS_COND BIT(0) + +#define SPE_OP_PKT_BRANCH_SUBCLASS_MASK GENMASK_ULL(7, 1) +#define SPE_OP_PKT_BRANCH_SUBCLASS_DIRECT (0x0) +#define SPE_OP_PKT_BRANCH_SUBCLASS_INDIRECT (0x2) + +#define SPE_OP_PKT_BRANCH_SUBCLASS_COND BIT(0) + +#define SPE_OP_PKT_LDST_SUBCLASS_MASK GENMASK_ULL(7, 1) +#define SPE_OP_PKT_LDST_SUBCLASS_GP_REG (0x0) +#define SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP (0x4) +#define SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG (0x10) +#define SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG (0x30) + +#define SPE_OP_PKT_LDST_SUBCLASS_ATOMIC_MASK (GENMASK_ULL(7, 5) | GENMASK_ULL(1, 1)) +#define SPE_OP_PKT_LDST_SUBCLASS_ATOMIC (0x2) + +#define SPE_OP_PKT_LDST_SUBCLASS_SVE_MASK (GENMASK_ULL(3, 3) | GENMASK_ULL(1, 1)) +#define SPE_OP_PKT_LDST_SUBCLASS_SVE (0x8) + +#define SPE_OP_PKT_AR BIT(4) +#define SPE_OP_PKT_EXCL BIT(3) +#define SPE_OP_PKT_AT BIT(2) +#define SPE_OP_PKT_LDST BIT(0) + const char *arm_spe_pkt_name(enum arm_spe_pkt_type); int arm_spe_get_packet(const unsigned char *buf, size_t len, -- 2.20.1
