Qualcom IPQ5018 SoC uses QPIC NAND controller version 2.1.1 which uses BAM DMA Engine and QSPI serial nand interface.
Signed-off-by: Md Sadre Alam <mda...@codeaurora.org> --- Documentation/devicetree/bindings/mtd/qcom_nandc.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt index 5c2fba4..0bfa316 100644 --- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt +++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt @@ -8,6 +8,9 @@ Required properties: IPQ4019 SoC and it uses BAM DMA * "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in IPQ8074 SoC and it uses BAM DMA + * "qcom,ipq5018-nand" - for QPIC NAND controller v2.1.1 being used in + IPQ5018 SoC and it uses BAM DMA and QSPI serial + nand interface. - reg: MMIO address range - clocks: must contain core clock and always on clock -- 2.7.4