On Tue, Oct 20, 2020 at 11:52:34AM +0800, Chen-Yu Tsai wrote: > On Tue, Oct 20, 2020 at 1:43 AM Alexander Kochetkov <al.koc...@gmail.com> > wrote: > > > > > > > > > 19 окт. 2020 г., в 11:21, Maxime Ripard <max...@cerno.tech> написал(а): > > > > > > Hi! > > > > > > On Thu, Oct 15, 2020 at 06:47:40PM +0300, Alexander Kochetkov wrote: > > >> DMA-based transfer will be enabled if data length is larger than FIFO > > >> size > > >> (64 bytes for A64). This greatly reduce number of interrupts for > > >> transferring data. > > >> > > >> For smaller data size PIO mode will be used. In PIO mode whole buffer > > >> will > > >> be loaded into FIFO. > > >> > > >> If driver failed to request DMA channels then it fallback for PIO mode. > > >> > > >> Tested on SOPINE (https://www.pine64.org/sopine/) > > >> > > >> Signed-off-by: Alexander Kochetkov <al.koc...@gmail.com> > > > > > > Thanks for working on this, it's been a bit overdue > > > > Hi, Maxime! > > > > We did custom A64 based computation module for our product. > > Do you mean that A64 is obsolete or EOL product? > > If so, can you recommend active replacement for A64 from Allwinner same > > price? > > I believe what Maxime meant was that DMA transfer for SPI is a long > sought-after feature, but no one had finished it.
Yeah, that's what I meant :) Maxime
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