On 22/10/2020 15:58, Leo Yan wrote:

Hi,

> For the operation type packet payload with load/store class, it misses
> to support these sub classes:
> 
>   - A load/store targeting the general-purpose registers;
>   - A load/store targeting unspecified registers;
>   - The ARMv8.4 nested virtualisation extension can redirect system
>     register accesses to a memory page controlled by the hypervisor.
>     The SPE profiling feature in newer implementations can tag those
>     memory accesses accordingly.
> 
> Add the bit pattern describing load/store sub classes, so that the perf
> tool can decode it properly.
> 
> Inspired by Andre Przywara, refined the commit log and code for more
> clear description.
> 
> Co-developed-by: Andre Przywara <andre.przyw...@arm.com>
> Signed-off-by: Leo Yan <leo....@linaro.org>

Reviewed-by: Andre Przywara <andre.przyw...@arm.com>

Cheers,
Andre

> ---
>  .../arm-spe-decoder/arm-spe-pkt-decoder.c     | 28 +++++++++++++++++--
>  1 file changed, 26 insertions(+), 2 deletions(-)
> 
> diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c 
> b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> index 59b538563d31..c1a3b0afd1de 100644
> --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
> @@ -370,11 +370,35 @@ static int arm_spe_pkt_desc_op_type(const struct 
> arm_spe_pkt *packet,
>                               if (ret < 0)
>                                       return ret;
>                       }
> -             } else if (SPE_OP_PKT_LDST_SUBCLASS_GET(payload) ==
> -                                     SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP) {
> +             }
> +
> +             switch (SPE_OP_PKT_LDST_SUBCLASS_GET(payload)) {
> +             case SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP:
>                       ret = arm_spe_pkt_snprintf(&buf, &blen, " SIMD-FP");
>                       if (ret < 0)
>                               return ret;
> +
> +                     break;
> +             case SPE_OP_PKT_LDST_SUBCLASS_GP_REG:
> +                     ret = arm_spe_pkt_snprintf(&buf, &blen, " GP-REG");
> +                     if (ret < 0)
> +                             return ret;
> +
> +                     break;
> +             case SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG:
> +                     ret = arm_spe_pkt_snprintf(&buf, &blen, " UNSPEC-REG");
> +                     if (ret < 0)
> +                             return ret;
> +
> +                     break;
> +             case SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG:
> +                     ret = arm_spe_pkt_snprintf(&buf, &blen, " NV-SYSREG");
> +                     if (ret < 0)
> +                             return ret;
> +
> +                     break;
> +             default:
> +                     break;
>               }
>  
>               return buf_len - blen;
> 

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