[PATCH v3 05/26] coresight: etm4x: Handle TRCVIPCSSCTLR accesses

[Suzuki K Poulose]

TRCVIPCSSCTLR is not present if the TRCIDR4.NUMPC > 0. Thus we
should only access the register if it is present, preventing
any undesired behavior.

Signed-off-by: Suzuki K Poulose <suzuki.poul...@arm.com>
---
 drivers/hwtracing/coresight/coresight-etm4x-core.c | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c 
b/drivers/hwtracing/coresight/coresight-etm4x-core.c
index 28dd278f6d47..d78a37b6592c 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
@@ -141,8 +141,9 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata)
        writel_relaxed(config->viiectlr, drvdata->base + TRCVIIECTLR);
        writel_relaxed(config->vissctlr,
                       drvdata->base + TRCVISSCTLR);
-       writel_relaxed(config->vipcssctlr,
-                      drvdata->base + TRCVIPCSSCTLR);
+       if (drvdata->nr_pe_cmp)
+               writel_relaxed(config->vipcssctlr,
+                              drvdata->base + TRCVIPCSSCTLR);
        for (i = 0; i < drvdata->nrseqstate - 1; i++)
                writel_relaxed(config->seq_ctrl[i],
                               drvdata->base + TRCSEQEVRn(i));
@@ -1202,7 +1203,8 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata)
        state->trcvictlr = readl(drvdata->base + TRCVICTLR);
        state->trcviiectlr = readl(drvdata->base + TRCVIIECTLR);
        state->trcvissctlr = readl(drvdata->base + TRCVISSCTLR);
-       state->trcvipcssctlr = readl(drvdata->base + TRCVIPCSSCTLR);
+       if (drvdata->nr_pe_cmp)
+               state->trcvipcssctlr = readl(drvdata->base + TRCVIPCSSCTLR);
        state->trcvdctlr = readl(drvdata->base + TRCVDCTLR);
        state->trcvdsacctlr = readl(drvdata->base + TRCVDSACCTLR);
        state->trcvdarcctlr = readl(drvdata->base + TRCVDARCCTLR);
@@ -1310,7 +1312,8 @@ static void etm4_cpu_restore(struct etmv4_drvdata 
*drvdata)
        writel_relaxed(state->trcvictlr, drvdata->base + TRCVICTLR);
        writel_relaxed(state->trcviiectlr, drvdata->base + TRCVIIECTLR);
        writel_relaxed(state->trcvissctlr, drvdata->base + TRCVISSCTLR);
-       writel_relaxed(state->trcvipcssctlr, drvdata->base + TRCVIPCSSCTLR);
+       if (drvdata->nr_pe_cmp)
+               writel_relaxed(state->trcvipcssctlr, drvdata->base + 
TRCVIPCSSCTLR);
        writel_relaxed(state->trcvdctlr, drvdata->base + TRCVDCTLR);
        writel_relaxed(state->trcvdsacctlr, drvdata->base + TRCVDSACCTLR);
        writel_relaxed(state->trcvdarcctlr, drvdata->base + TRCVDARCCTLR);
-- 
2.24.1