I'm still worried about this. If power state based suspend does always work despite a HMB and is preferred for the specific Google board we should have purely a DMI based quirk for the board independent of the NVMe controller used with it.
But if these LiteON devices can't properly handle nvme_dev_disable calls we have much deeper problems, because it can be called in all kinds of places, including suspending when not on this specific board. That being said, I still really do not understand this sentence and thus the problem at all: > When NVMe device receive D3hot from host, NVMe firmware will do > garbage collection. While NVMe device do Garbage collection, > firmware has chance to going incorrect address.
