Hi Martin, Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on fujitsu-integration/mailbox-for-next] [also build test WARNING on stm32/stm32-next linus/master linux/master v5.10-rc1 next-20201030] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Martin-Kaiser/mailbox-stm32-ipcc-add-COMPILE_TEST-dependency/20201024-220512 base: https://git.linaro.org/landing-teams/working/fujitsu/integration.git mailbox-for-next config: x86_64-randconfig-r023-20201030 (attached as .config) compiler: clang version 12.0.0 (https://github.com/llvm/llvm-project 772aaa602383cf82795572ebcd86b0e660f3579f) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # install x86_64 cross compiling tool for clang build # apt-get install binutils-x86-64-linux-gnu # https://github.com/0day-ci/linux/commit/6e22aaac25dcdd4c098c57d29363fa2c204e411e git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Martin-Kaiser/mailbox-stm32-ipcc-add-COMPILE_TEST-dependency/20201024-220512 git checkout 6e22aaac25dcdd4c098c57d29363fa2c204e411e # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <l...@intel.com> All warnings (new ones prefixed by >>): >> drivers/mailbox/stm32-ipcc.c:147:22: warning: cast to smaller integer type >> 'unsigned int' from 'void *' [-Wvoid-pointer-to-int-cast] unsigned int chan = (unsigned int)link->con_priv; ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/mailbox/stm32-ipcc.c:166:22: warning: cast to smaller integer type 'unsigned int' from 'void *' [-Wvoid-pointer-to-int-cast] unsigned int chan = (unsigned int)link->con_priv; ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/mailbox/stm32-ipcc.c:186:22: warning: cast to smaller integer type 'unsigned int' from 'void *' [-Wvoid-pointer-to-int-cast] unsigned int chan = (unsigned int)link->con_priv; ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ >> drivers/mailbox/stm32-ipcc.c:310:40: warning: cast to 'void *' from smaller >> integer type 'unsigned int' [-Wint-to-void-pointer-cast] ipcc->controller.chans[i].con_priv = (void *)i; ^~~~~~~~~ 4 warnings generated. vim +147 drivers/mailbox/stm32-ipcc.c ffbded7dee97563 Fabien Dessenne 2018-05-31 144 ffbded7dee97563 Fabien Dessenne 2018-05-31 145 static int stm32_ipcc_send_data(struct mbox_chan *link, void *data) ffbded7dee97563 Fabien Dessenne 2018-05-31 146 { ffbded7dee97563 Fabien Dessenne 2018-05-31 @147 unsigned int chan = (unsigned int)link->con_priv; ffbded7dee97563 Fabien Dessenne 2018-05-31 148 struct stm32_ipcc *ipcc = container_of(link->mbox, struct stm32_ipcc, ffbded7dee97563 Fabien Dessenne 2018-05-31 149 controller); ffbded7dee97563 Fabien Dessenne 2018-05-31 150 ffbded7dee97563 Fabien Dessenne 2018-05-31 151 dev_dbg(ipcc->controller.dev, "%s: chan:%d\n", __func__, chan); ffbded7dee97563 Fabien Dessenne 2018-05-31 152 ffbded7dee97563 Fabien Dessenne 2018-05-31 153 /* set channel n occupied */ dba9a3dfe912dc4 Arnaud Pouliquen 2019-05-22 154 stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XSCR, dba9a3dfe912dc4 Arnaud Pouliquen 2019-05-22 155 TX_BIT_CHAN(chan)); ffbded7dee97563 Fabien Dessenne 2018-05-31 156 ffbded7dee97563 Fabien Dessenne 2018-05-31 157 /* unmask 'tx channel free' interrupt */ dba9a3dfe912dc4 Arnaud Pouliquen 2019-05-22 158 stm32_ipcc_clr_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR, dba9a3dfe912dc4 Arnaud Pouliquen 2019-05-22 159 TX_BIT_CHAN(chan)); ffbded7dee97563 Fabien Dessenne 2018-05-31 160 ffbded7dee97563 Fabien Dessenne 2018-05-31 161 return 0; ffbded7dee97563 Fabien Dessenne 2018-05-31 162 } ffbded7dee97563 Fabien Dessenne 2018-05-31 163 ffbded7dee97563 Fabien Dessenne 2018-05-31 164 static int stm32_ipcc_startup(struct mbox_chan *link) ffbded7dee97563 Fabien Dessenne 2018-05-31 165 { ffbded7dee97563 Fabien Dessenne 2018-05-31 166 unsigned int chan = (unsigned int)link->con_priv; ffbded7dee97563 Fabien Dessenne 2018-05-31 167 struct stm32_ipcc *ipcc = container_of(link->mbox, struct stm32_ipcc, ffbded7dee97563 Fabien Dessenne 2018-05-31 168 controller); ffbded7dee97563 Fabien Dessenne 2018-05-31 169 int ret; ffbded7dee97563 Fabien Dessenne 2018-05-31 170 ffbded7dee97563 Fabien Dessenne 2018-05-31 171 ret = clk_prepare_enable(ipcc->clk); ffbded7dee97563 Fabien Dessenne 2018-05-31 172 if (ret) { ffbded7dee97563 Fabien Dessenne 2018-05-31 173 dev_err(ipcc->controller.dev, "can not enable the clock\n"); ffbded7dee97563 Fabien Dessenne 2018-05-31 174 return ret; ffbded7dee97563 Fabien Dessenne 2018-05-31 175 } ffbded7dee97563 Fabien Dessenne 2018-05-31 176 ffbded7dee97563 Fabien Dessenne 2018-05-31 177 /* unmask 'rx channel occupied' interrupt */ dba9a3dfe912dc4 Arnaud Pouliquen 2019-05-22 178 stm32_ipcc_clr_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR, dba9a3dfe912dc4 Arnaud Pouliquen 2019-05-22 179 RX_BIT_CHAN(chan)); ffbded7dee97563 Fabien Dessenne 2018-05-31 180 ffbded7dee97563 Fabien Dessenne 2018-05-31 181 return 0; ffbded7dee97563 Fabien Dessenne 2018-05-31 182 } ffbded7dee97563 Fabien Dessenne 2018-05-31 183 ffbded7dee97563 Fabien Dessenne 2018-05-31 184 static void stm32_ipcc_shutdown(struct mbox_chan *link) ffbded7dee97563 Fabien Dessenne 2018-05-31 185 { ffbded7dee97563 Fabien Dessenne 2018-05-31 186 unsigned int chan = (unsigned int)link->con_priv; ffbded7dee97563 Fabien Dessenne 2018-05-31 187 struct stm32_ipcc *ipcc = container_of(link->mbox, struct stm32_ipcc, ffbded7dee97563 Fabien Dessenne 2018-05-31 188 controller); ffbded7dee97563 Fabien Dessenne 2018-05-31 189 ffbded7dee97563 Fabien Dessenne 2018-05-31 190 /* mask rx/tx interrupt */ dba9a3dfe912dc4 Arnaud Pouliquen 2019-05-22 191 stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR, ffbded7dee97563 Fabien Dessenne 2018-05-31 192 RX_BIT_CHAN(chan) | TX_BIT_CHAN(chan)); ffbded7dee97563 Fabien Dessenne 2018-05-31 193 ffbded7dee97563 Fabien Dessenne 2018-05-31 194 clk_disable_unprepare(ipcc->clk); ffbded7dee97563 Fabien Dessenne 2018-05-31 195 } ffbded7dee97563 Fabien Dessenne 2018-05-31 196 ffbded7dee97563 Fabien Dessenne 2018-05-31 197 static const struct mbox_chan_ops stm32_ipcc_ops = { ffbded7dee97563 Fabien Dessenne 2018-05-31 198 .send_data = stm32_ipcc_send_data, ffbded7dee97563 Fabien Dessenne 2018-05-31 199 .startup = stm32_ipcc_startup, ffbded7dee97563 Fabien Dessenne 2018-05-31 200 .shutdown = stm32_ipcc_shutdown, ffbded7dee97563 Fabien Dessenne 2018-05-31 201 }; ffbded7dee97563 Fabien Dessenne 2018-05-31 202 ffbded7dee97563 Fabien Dessenne 2018-05-31 203 static int stm32_ipcc_probe(struct platform_device *pdev) ffbded7dee97563 Fabien Dessenne 2018-05-31 204 { ffbded7dee97563 Fabien Dessenne 2018-05-31 205 struct device *dev = &pdev->dev; ffbded7dee97563 Fabien Dessenne 2018-05-31 206 struct device_node *np = dev->of_node; ffbded7dee97563 Fabien Dessenne 2018-05-31 207 struct stm32_ipcc *ipcc; ffbded7dee97563 Fabien Dessenne 2018-05-31 208 struct resource *res; ffbded7dee97563 Fabien Dessenne 2018-05-31 209 unsigned int i; ffbded7dee97563 Fabien Dessenne 2018-05-31 210 int ret; ffbded7dee97563 Fabien Dessenne 2018-05-31 211 u32 ip_ver; ffbded7dee97563 Fabien Dessenne 2018-05-31 212 static const char * const irq_name[] = {"rx", "tx"}; ffbded7dee97563 Fabien Dessenne 2018-05-31 213 irq_handler_t irq_thread[] = {stm32_ipcc_rx_irq, stm32_ipcc_tx_irq}; ffbded7dee97563 Fabien Dessenne 2018-05-31 214 ffbded7dee97563 Fabien Dessenne 2018-05-31 215 if (!np) { ffbded7dee97563 Fabien Dessenne 2018-05-31 216 dev_err(dev, "No DT found\n"); ffbded7dee97563 Fabien Dessenne 2018-05-31 217 return -ENODEV; ffbded7dee97563 Fabien Dessenne 2018-05-31 218 } ffbded7dee97563 Fabien Dessenne 2018-05-31 219 ffbded7dee97563 Fabien Dessenne 2018-05-31 220 ipcc = devm_kzalloc(dev, sizeof(*ipcc), GFP_KERNEL); ffbded7dee97563 Fabien Dessenne 2018-05-31 221 if (!ipcc) ffbded7dee97563 Fabien Dessenne 2018-05-31 222 return -ENOMEM; ffbded7dee97563 Fabien Dessenne 2018-05-31 223 dba9a3dfe912dc4 Arnaud Pouliquen 2019-05-22 224 spin_lock_init(&ipcc->lock); dba9a3dfe912dc4 Arnaud Pouliquen 2019-05-22 225 ffbded7dee97563 Fabien Dessenne 2018-05-31 226 /* proc_id */ ffbded7dee97563 Fabien Dessenne 2018-05-31 227 if (of_property_read_u32(np, "st,proc-id", &ipcc->proc_id)) { ffbded7dee97563 Fabien Dessenne 2018-05-31 228 dev_err(dev, "Missing st,proc-id\n"); ffbded7dee97563 Fabien Dessenne 2018-05-31 229 return -ENODEV; ffbded7dee97563 Fabien Dessenne 2018-05-31 230 } ffbded7dee97563 Fabien Dessenne 2018-05-31 231 ffbded7dee97563 Fabien Dessenne 2018-05-31 232 if (ipcc->proc_id >= STM32_MAX_PROCS) { ffbded7dee97563 Fabien Dessenne 2018-05-31 233 dev_err(dev, "Invalid proc_id (%d)\n", ipcc->proc_id); ffbded7dee97563 Fabien Dessenne 2018-05-31 234 return -EINVAL; ffbded7dee97563 Fabien Dessenne 2018-05-31 235 } ffbded7dee97563 Fabien Dessenne 2018-05-31 236 ffbded7dee97563 Fabien Dessenne 2018-05-31 237 /* regs */ ffbded7dee97563 Fabien Dessenne 2018-05-31 238 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ffbded7dee97563 Fabien Dessenne 2018-05-31 239 ipcc->reg_base = devm_ioremap_resource(dev, res); ffbded7dee97563 Fabien Dessenne 2018-05-31 240 if (IS_ERR(ipcc->reg_base)) ffbded7dee97563 Fabien Dessenne 2018-05-31 241 return PTR_ERR(ipcc->reg_base); ffbded7dee97563 Fabien Dessenne 2018-05-31 242 ffbded7dee97563 Fabien Dessenne 2018-05-31 243 ipcc->reg_proc = ipcc->reg_base + ipcc->proc_id * IPCC_PROC_OFFST; ffbded7dee97563 Fabien Dessenne 2018-05-31 244 ffbded7dee97563 Fabien Dessenne 2018-05-31 245 /* clock */ ffbded7dee97563 Fabien Dessenne 2018-05-31 246 ipcc->clk = devm_clk_get(dev, NULL); ffbded7dee97563 Fabien Dessenne 2018-05-31 247 if (IS_ERR(ipcc->clk)) ffbded7dee97563 Fabien Dessenne 2018-05-31 248 return PTR_ERR(ipcc->clk); ffbded7dee97563 Fabien Dessenne 2018-05-31 249 ffbded7dee97563 Fabien Dessenne 2018-05-31 250 ret = clk_prepare_enable(ipcc->clk); ffbded7dee97563 Fabien Dessenne 2018-05-31 251 if (ret) { ffbded7dee97563 Fabien Dessenne 2018-05-31 252 dev_err(dev, "can not enable the clock\n"); ffbded7dee97563 Fabien Dessenne 2018-05-31 253 return ret; ffbded7dee97563 Fabien Dessenne 2018-05-31 254 } ffbded7dee97563 Fabien Dessenne 2018-05-31 255 ffbded7dee97563 Fabien Dessenne 2018-05-31 256 /* irq */ ffbded7dee97563 Fabien Dessenne 2018-05-31 257 for (i = 0; i < IPCC_IRQ_NUM; i++) { 68a1c8485cf8373 Fabien Dessenne 2019-04-24 258 ipcc->irqs[i] = platform_get_irq_byname(pdev, irq_name[i]); ffbded7dee97563 Fabien Dessenne 2018-05-31 259 if (ipcc->irqs[i] < 0) { 68a1c8485cf8373 Fabien Dessenne 2019-04-24 260 if (ipcc->irqs[i] != -EPROBE_DEFER) 68a1c8485cf8373 Fabien Dessenne 2019-04-24 261 dev_err(dev, "no IRQ specified %s\n", 68a1c8485cf8373 Fabien Dessenne 2019-04-24 262 irq_name[i]); ffbded7dee97563 Fabien Dessenne 2018-05-31 263 ret = ipcc->irqs[i]; ffbded7dee97563 Fabien Dessenne 2018-05-31 264 goto err_clk; ffbded7dee97563 Fabien Dessenne 2018-05-31 265 } ffbded7dee97563 Fabien Dessenne 2018-05-31 266 ffbded7dee97563 Fabien Dessenne 2018-05-31 267 ret = devm_request_threaded_irq(dev, ipcc->irqs[i], NULL, ffbded7dee97563 Fabien Dessenne 2018-05-31 268 irq_thread[i], IRQF_ONESHOT, ffbded7dee97563 Fabien Dessenne 2018-05-31 269 dev_name(dev), ipcc); ffbded7dee97563 Fabien Dessenne 2018-05-31 270 if (ret) { ffbded7dee97563 Fabien Dessenne 2018-05-31 271 dev_err(dev, "failed to request irq %d (%d)\n", i, ret); ffbded7dee97563 Fabien Dessenne 2018-05-31 272 goto err_clk; ffbded7dee97563 Fabien Dessenne 2018-05-31 273 } ffbded7dee97563 Fabien Dessenne 2018-05-31 274 } ffbded7dee97563 Fabien Dessenne 2018-05-31 275 ffbded7dee97563 Fabien Dessenne 2018-05-31 276 /* mask and enable rx/tx irq */ dba9a3dfe912dc4 Arnaud Pouliquen 2019-05-22 277 stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XMR, ffbded7dee97563 Fabien Dessenne 2018-05-31 278 RX_BIT_MASK | TX_BIT_MASK); dba9a3dfe912dc4 Arnaud Pouliquen 2019-05-22 279 stm32_ipcc_set_bits(&ipcc->lock, ipcc->reg_proc + IPCC_XCR, dba9a3dfe912dc4 Arnaud Pouliquen 2019-05-22 280 XCR_RXOIE | XCR_TXOIE); ffbded7dee97563 Fabien Dessenne 2018-05-31 281 ffbded7dee97563 Fabien Dessenne 2018-05-31 282 /* wakeup */ ffbded7dee97563 Fabien Dessenne 2018-05-31 283 if (of_property_read_bool(np, "wakeup-source")) { eac36c8651210df Fabien Dessenne 2019-01-04 284 device_set_wakeup_capable(dev, true); 69269446ccbf2b4 Fabien Dessenne 2019-10-30 285 69269446ccbf2b4 Fabien Dessenne 2019-10-30 286 ret = dev_pm_set_wake_irq(dev, ipcc->irqs[IPCC_IRQ_RX]); ffbded7dee97563 Fabien Dessenne 2018-05-31 287 if (ret) { ffbded7dee97563 Fabien Dessenne 2018-05-31 288 dev_err(dev, "Failed to set wake up irq\n"); ffbded7dee97563 Fabien Dessenne 2018-05-31 289 goto err_init_wkp; ffbded7dee97563 Fabien Dessenne 2018-05-31 290 } ffbded7dee97563 Fabien Dessenne 2018-05-31 291 } ffbded7dee97563 Fabien Dessenne 2018-05-31 292 ffbded7dee97563 Fabien Dessenne 2018-05-31 293 /* mailbox controller */ ffbded7dee97563 Fabien Dessenne 2018-05-31 294 ipcc->n_chans = readl_relaxed(ipcc->reg_base + IPCC_HWCFGR); ffbded7dee97563 Fabien Dessenne 2018-05-31 295 ipcc->n_chans &= IPCFGR_CHAN_MASK; ffbded7dee97563 Fabien Dessenne 2018-05-31 296 ffbded7dee97563 Fabien Dessenne 2018-05-31 297 ipcc->controller.dev = dev; ffbded7dee97563 Fabien Dessenne 2018-05-31 298 ipcc->controller.txdone_irq = true; ffbded7dee97563 Fabien Dessenne 2018-05-31 299 ipcc->controller.ops = &stm32_ipcc_ops; ffbded7dee97563 Fabien Dessenne 2018-05-31 300 ipcc->controller.num_chans = ipcc->n_chans; ffbded7dee97563 Fabien Dessenne 2018-05-31 301 ipcc->controller.chans = devm_kcalloc(dev, ipcc->controller.num_chans, ffbded7dee97563 Fabien Dessenne 2018-05-31 302 sizeof(*ipcc->controller.chans), ffbded7dee97563 Fabien Dessenne 2018-05-31 303 GFP_KERNEL); ffbded7dee97563 Fabien Dessenne 2018-05-31 304 if (!ipcc->controller.chans) { ffbded7dee97563 Fabien Dessenne 2018-05-31 305 ret = -ENOMEM; ffbded7dee97563 Fabien Dessenne 2018-05-31 306 goto err_irq_wkp; ffbded7dee97563 Fabien Dessenne 2018-05-31 307 } ffbded7dee97563 Fabien Dessenne 2018-05-31 308 ffbded7dee97563 Fabien Dessenne 2018-05-31 309 for (i = 0; i < ipcc->controller.num_chans; i++) ffbded7dee97563 Fabien Dessenne 2018-05-31 @310 ipcc->controller.chans[i].con_priv = (void *)i; ffbded7dee97563 Fabien Dessenne 2018-05-31 311 368d7767b50154e Thierry Reding 2018-12-20 312 ret = devm_mbox_controller_register(dev, &ipcc->controller); ffbded7dee97563 Fabien Dessenne 2018-05-31 313 if (ret) ffbded7dee97563 Fabien Dessenne 2018-05-31 314 goto err_irq_wkp; ffbded7dee97563 Fabien Dessenne 2018-05-31 315 ffbded7dee97563 Fabien Dessenne 2018-05-31 316 platform_set_drvdata(pdev, ipcc); ffbded7dee97563 Fabien Dessenne 2018-05-31 317 ffbded7dee97563 Fabien Dessenne 2018-05-31 318 ip_ver = readl_relaxed(ipcc->reg_base + IPCC_VER); ffbded7dee97563 Fabien Dessenne 2018-05-31 319 ffbded7dee97563 Fabien Dessenne 2018-05-31 320 dev_info(dev, "ipcc rev:%ld.%ld enabled, %d chans, proc %d\n", ffbded7dee97563 Fabien Dessenne 2018-05-31 321 FIELD_GET(VER_MAJREV_MASK, ip_ver), ffbded7dee97563 Fabien Dessenne 2018-05-31 322 FIELD_GET(VER_MINREV_MASK, ip_ver), ffbded7dee97563 Fabien Dessenne 2018-05-31 323 ipcc->controller.num_chans, ipcc->proc_id); ffbded7dee97563 Fabien Dessenne 2018-05-31 324 ffbded7dee97563 Fabien Dessenne 2018-05-31 325 clk_disable_unprepare(ipcc->clk); ffbded7dee97563 Fabien Dessenne 2018-05-31 326 return 0; ffbded7dee97563 Fabien Dessenne 2018-05-31 327 ffbded7dee97563 Fabien Dessenne 2018-05-31 328 err_irq_wkp: 69269446ccbf2b4 Fabien Dessenne 2019-10-30 329 if (of_property_read_bool(np, "wakeup-source")) ffbded7dee97563 Fabien Dessenne 2018-05-31 330 dev_pm_clear_wake_irq(dev); ffbded7dee97563 Fabien Dessenne 2018-05-31 331 err_init_wkp: 69269446ccbf2b4 Fabien Dessenne 2019-10-30 332 device_set_wakeup_capable(dev, false); ffbded7dee97563 Fabien Dessenne 2018-05-31 333 err_clk: ffbded7dee97563 Fabien Dessenne 2018-05-31 334 clk_disable_unprepare(ipcc->clk); ffbded7dee97563 Fabien Dessenne 2018-05-31 335 return ret; ffbded7dee97563 Fabien Dessenne 2018-05-31 336 } ffbded7dee97563 Fabien Dessenne 2018-05-31 337 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org
.config.gz
Description: application/gzip
