Hi Geert,
Thank you for the review.
On Fri, Nov 20, 2020 at 9:20 AM Geert Uytterhoeven <ge...@linux-m68k.org> wrote:
>
> On Thu, Nov 19, 2020 at 2:09 PM Lad Prabhakar
> <prabhakar.mahadev-lad...@bp.renesas.com> wrote:
> > Add pins, groups and functions for QSPIO[01].
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad...@bp.renesas.com>
> > Reviewed-by: Biju Das <biju.das...@bp.renesas.com>
>
> Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
> i.e. will queue in renesas-pinctrl-for-v5.11...
>
> > --- a/drivers/pinctrl/renesas/pfc-r8a77990.c
> > +++ b/drivers/pinctrl/renesas/pfc-r8a77990.c
> > @@ -2810,6 +2810,57 @@ static const unsigned int pwm6_b_mux[] = {
> > PWM6_B_MARK,
> > };
> >
> > +/* - QSPI0
> > ------------------------------------------------------------------ */
> > +static const unsigned int qspi0_ctrl_pins[] = {
> > + /* SPCLK, SSL */
>
> ... with the missing QSPI0_ prefix added...
>
Argh missed that.
> > + RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 5),
> > +};
> > +static const unsigned int qspi0_ctrl_mux[] = {
> > + QSPI0_SPCLK_MARK, QSPI0_SSL_MARK,
> > +};
> > +static const unsigned int qspi0_data2_pins[] = {
> > + /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
> > + RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 2),
> > +};
> > +static const unsigned int qspi0_data2_mux[] = {
> > + QSPI0_MOSI_IO0_MARK, QSPI0_MISO_IO1_MARK,
> > +};
> > +static const unsigned int qspi0_data4_pins[] = {
> > + /* QSPI0_MOSI_IO0, QSPI0_MISO_IO1 */
> > + RCAR_GP_PIN(2, 1), RCAR_GP_PIN(2, 2),
> > + /* QSPI0_IO2, QSPI0_IO3 */
>
> ... and the bogus space dropped.
>
Thanks for taking care of it.
Cheers,
Prabhakar
> > + RCAR_GP_PIN(2, 3), RCAR_GP_PIN(2, 4),
> > +};
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
> ge...@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like
> that.
> -- Linus Torvalds
