The GPIO controller is at the same address in all of the
currently known chips so create a node for it in the base
dtsi.
Some extra properties are needed to actually use it so
disable it by default.
Signed-off-by: Daniel Palmer <dan...@0x0f.com>
Acked-by: Linus Walleij <linus.wall...@linaro.org>
---
arch/arm/boot/dts/mstar-v7.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi
index f07880561e11..81369bc07f78 100644
--- a/arch/arm/boot/dts/mstar-v7.dtsi
+++ b/arch/arm/boot/dts/mstar-v7.dtsi
@@ -109,6 +109,16 @@ l3bridge: l3bridge@204400 {
reg = <0x204400 0x200>;
};
+ gpio: gpio@207800 {
+ #gpio-cells = <2>;
+ reg = <0x207800 0x200>;
+ gpio-controller;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&intc_fiq>;
+ status = "disabled";
+ };
+
pm_uart: uart@221000 {
compatible = "ns16550a";
reg = <0x221000 0x100>;
--
2.29.2
